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參數(shù)資料
| 型號： | W78M64VP110SBI |
| 廠商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分類： | 存儲器 |
| 英文描述： | SPECIALTY MEMORY CIRCUIT, PBGA156 |
| 封裝： | 13 X 22 MM, PLASTIC, BGA-156 |
| 文件頁數(shù)： | 6/48頁 |
| 文件大?。?/td> | 1548K |
| 代理商： | W78M64VP110SBI |
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White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
W78M64VP-XSBX
October 2008
Rev. 2
ADVANCED
White Electronic Designs Corp. reserves the right to change products or specications without notice.
8. The lower two address bits (A1–A0) are valid during the
Password Read, Password Program, and Password
Unlock.
9. The exact password must be entered in order for the
unlocking function to occur.
10.The Password Unlock command cannot be issued
any faster than 1 μs at a time to prevent a hacker from
running through all the 64-bit combinations in an attempt
to correctly match a password.
11. Approximately 1 μs is required for unlocking the device
after the valid 64-bit password is given to the device.
12.Password verication is only allowed during the password
programming operation.
13. All further commands to the password region are
disabled and all operations are ignored.
14. If the password is lost after setting the Password Mode
Lock Bit, there is no way to clear the PPB Lock Bit.
15. Entry command sequence must be issued prior to any
of any operation and it disables reads and writes for
Sector 0. Reads and writes for other sectors excluding
Sector 0 are allowed.
16. If the user attempts to program or erase a protected
sector, the device ignores the command and returns
to read mode.
17. A program or erase command to a protected sector
enables status polling and returns to read mode without
having modied the contents of the protected sector.
18. The programming of the DYB, PPB, and PPB Lock for a
given sector can be veried by writing individual status
read commands DYB Status, PPB Status, and PPB
Lock Status to the device.
Hardware Data Protection
Methods
The device offers two main types of data protection at the
sector level via hardware control:
When WP#/ACC is at VIL, the either the highest or
lowest sector is locked (device specic).
There are additional methods by which intended or
accidental erasure of any sectors can be prevented via
hardware means. The following subsections describes
these methods:
WP#/ACC METHOD
The Write Protect feature provides a hardware method of
protecting one outermost sector. This function is provided
by the WP#/ACC pin and overrides the previously discussed
Sector Protection/Unprotection method.
If the system asserts VIL on the WP#/ACC pin, the device
disables program and erase functions in the highest or
lowest sector independently of whether the sector was
protected or unprotected using the method described in
Advanced Sector Protection/Unprotection.
If the system asserts VIH on the WP#/ACC pin, the device
reverts to whether the boot sectors were last set to be
protected or unprotected. That is, sector protection or
unprotection for these sectors depends on whether they
were last protected or unprotected.
The WP#/ACC pin must be held stable during a command
sequence execution. WP# has an internal pull-up; when
unconnected, WP# is set at VIH.
NOTE
If WP#/ACC is at VIL when the device is in the standby
mode, the maximum input load current is increased.
LOW VCC WRITE INHIBIT
When VCC is less than VLKO, the device does not accept
any write cycles. This protects data during VCC power-up
and power-down. The command register and all internal
program/erase circuits are disabled, and the device resets to
reading array data. Subsequent writes are ignored until VCC
is greater than VLKO. The system must provide the proper
signals to the control inputs to prevent unintentional writes
when VCC is greater than VLKO.
WRITE PULSE “GLITCH PROTECTION”
Noise pulses of less than 5 ns (typical) on OE#, CE# or
WE# do not initiate a write cycle.
POWER-UP WRITE INHIBIT
If WE# = CE# = RESET# = VIL and OE# = VIH during power
up, the device does not accept commands on the rising
edge of WE#. The internal state machine is automatically
reset to the read mode on power-up.
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