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參數(shù)資料
| 型號(hào)： | W9412FASA-75 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | DRAM |
| 英文描述： | 16M X 64 DDR DRAM MODULE, 0.75 ns, DMA200 |
| 封裝： | SODIMM-200 |
| 文件頁(yè)數(shù)： | 14/15頁(yè) |
| 文件大小： | 0K |
| 代理商： | W9412FASA-75 |
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W9412FASA
- 8 -
12. AC TEST CONDITION OF SDRAM COMPONENTS
PARAMETER
SYM.
VALUE
UNIT
NOTE
Input High Voltage (AC)
VIH
VREF +0.31
V
Input Low Voltage (AC)
VIL
V REF -0.31
V
Input Reference Voltage
VREF
0.5 x VDDQ
V
Termination Voltage
VTT
0.5 x VDDQ
V
Input Signal Peak to Peak Swing
VSWING
1.0
V
Differential Clock Input Reference Voltage
VR
Vx (AC)
V
Input Difference Voltage. CLK and CLK inputs (AC)
VID (AC)
1.5
V
Input Signal Minimum Slew Rate
SLEW
1.0
V/nS
Output Timing Measurement Reference Voltage
VOTR
0.5 x VDDQ
V
V SWING (MAX)
VDDQ
VSS
T
VIH min (AC)
VREF
VIL max (AC)
SLEW = (VIH min (AC) - VILmax (AC)) / T
RT= 50 ohms
VTT
A.C. TEST LOAD (A)
Z = 50 ohms
output
30pF
Notes:
(1)
Conditions outside the limits listed under “ABSOLUTE MAXIMUM RATINGS” may cause permanent damage to the
device.
(2)
All voltages are referenced to VSS, VSSQ.
(3)
Peak to peak AC noise on VREF may not exceed
±2% of VREF(DC).
(4)
VOH = 1.95V, VOL = 0.35V
(5)
VOH = 1.9V, VOL = 0.4V
(6)
The values of IOH (DC) is based on VDDQ = 2.3V and VTT = 1.19V. The values of IOL (DC) is based on VDDQ =2.3V and
VTT = 1.11V.
(7)
These parameters depend on the cycle rate and these values are measured at a cycle rate with the minimum values
of tCK and tRC.
(8)
VTT is not applied directly to the device. VTT is a system supply for signal termination resistors, is expected to be set
equal to VREF and must track variations in the DC level of VREF.
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相關(guān)代理商/技術(shù)參數(shù) |
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| W9412G2CB | 制造商:WINBOND 制造商全稱:Winbond 功能描述:1M 】 4 BANKS 】 32 BITS GDDR SDRAM |
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| W9412G6CH | 制造商:WINBOND 制造商全稱:Winbond 功能描述:2M 】 4 BANKS 】 16 BITS DDR SDRAM |
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