參數(shù)資料
型號(hào)： W981204AH-8H
英文描述： x4 SDRAM
中文描述： x4內(nèi)存
文件頁(yè)數(shù)： 3/42頁(yè)
文件大?。?/td> 1082K
代理商： W981204AH-8H
W981204AH
8M x 4 Banks x 4 bits SDRAM
Revision 1.0 Publication Release Date: June, 2000
- 3 -
Pin Assignment
Pin Number
23 ~ 26, 22,
29 ~ 35
Pin Name
Function
Description
A0 ~ A11
Address
Multiplexed pins for row and column address.
Row address: A0 ~ A11. Column address: A0 ~ A9, A11.
Select bank to activate during row address latch time, or bank
to read/write during address latch time.
20, 21
BS0, BS1
Bank Select
5, 11, 44, 50
DQ0 ~ DQ3 Output
Multiplexed pins for data output and input.
19
CS#
Chip Select
Disable or enable the command decoder. When command
decoder is disabled, new command is ignored and previous
operation continues.
Command input. When sampled at the rising edge of the clock,
RAS#, CAS# and WE# define the operation to be executed.
18
RAS#
Row Address
Strobe
Column Address
Strobe
Write Enable
17
CAS#
Referred to RAS#
16
WE#
Referred to RAS#
The output buffer is placed at Hi-Z(with latency of 2) when
DQM is sampled high in read cycle. In write cycle, sampling
DQM high will block the write operation with zero latency.
System clock used to sample inputs on the rising edge of
clock.
CKE controls the clock activation and deactivation. When CKE
is low, Power Down mode, Suspend mode, or Self Refresh
mode is entered.
Power for input buffers and logic circuit inside DRAM.
Ground for input buffers and logic circuit inside DRAM.
39
DQM
input/output
mask
38
CLK
Clock Inputs
37
CKE
Clock Enable
1, 14, 27
28, 41, 54
V
CC
V
SS
Power ( +3.3 V )
Ground
Power ( + 3.3 V )
for I/O buffer
Ground for I/O
buffer
3, 9, 43, 49
V
CCQ
Separated power from V
CC
, to improve DQ noise immunity.
6, 12, 46, 52
V
SSQ
Separated ground from V
SS
, to improve DQ noise immunity.
2, 4, 7, 8, 10,
13, 15, 36, 40,
42, 45, 47, 48,
51, 52
NC
No Connection
No connection
相關(guān)PDF資料
PDF描述
W982504AH-7 x4 SDRAM
W982504AH-75 x4 SDRAM
W982504AH-8H x4 SDRAM
W982508AH-7 x8 SDRAM
W982508AH-75 x8 SDRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
W981208AH 制造商:WINBOND 制造商全稱(chēng):Winbond 功能描述:4M x 8 bit x 4 Banks SDRAM
W981208AH-75 制造商:WINBOND 制造商全稱(chēng):Winbond 功能描述:x8 SDRAM
W981208AH-8H 制造商:WINBOND 制造商全稱(chēng):Winbond 功能描述:x8 SDRAM
W981208BH 制造商:WINBOND 制造商全稱(chēng):Winbond 功能描述:4M x 4 BANKS x 8 BIT SDRAM
W981208BH-7 制造商:WINBOND 制造商全稱(chēng):Winbond 功能描述:x8 SDRAM
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