- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄203637 > W987Z6CBG80 (WINBOND ELECTRONICS CORP) 8M X 16 SYNCHRONOUS DRAM, 6 ns, PBGA54 PDF資料下載
參數(shù)資料
| 型號： | W987Z6CBG80 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | DRAM |
| 英文描述： | 8M X 16 SYNCHRONOUS DRAM, 6 ns, PBGA54 |
| 封裝： | 8 X 9 MM, 1.20 MM HEIGHT, FBGA-54 |
| 文件頁數(shù)： | 4/46頁 |
| 文件大?。?/td> | 1634K |
| 代理商： | W987Z6CBG80 |
第1頁第2頁第3頁當(dāng)前第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁
Preliminary W987Z6CB
- 12 -
12. FUNCTIONAL DESCRIPTION
Power Up Sequence
The default power up state of the mode register is unspecified. The following power up and
initialization sequence need to be followed to guarantee the device being preconditioned to each user
specific needs.
During power up, all VDD and VDDQ pins must be ramp up simultaneously to the specified voltage
when the input signals are held in the "NOP" state. The power up voltage must not exceed VDD +0.3V
on any of the input pins or VDD supplies. After power up, an initial pause of 200
S is required followed
by a precharge of all banks using the precharge command. To prevent data contention on the DQ bus
during power up, it is required that the DQM and CKE pins be held high during the initial pause period.
Once all banks have been precharged, the Mode Register Set Command must be issued to initialize
the Mode Register. An additional eight Auto Refresh cycles (CBR) are also required before or after
programming the Mode Register to ensure proper subsequent operation.
Command Function
Bank Activate command
( RAS = "L", CAS = "H", WE = "H", BS0, BS1 = Bank, A0 to A11 = Row Address)
The Bank Activate command activates the bank designated by the BS (Bank select) signal. Row
addresses are latched on A0 to A11 when this command is issued and the cell data is read out of
the sense amplifiers. The maximum time that each bank can be held in the active state is
specified as tRAS (max). After this command is issued, Read or Write operation can be executed.
Bank Precharge command
( RAS ="L", CAS = "H", WE = "L", BS0, BS1 = Bank, A10 = "L", A0 to A9, A11 = Don’t care)
The Bank Precharge command percharges the bank designated by BS. The precharged bank is
switched from the active state to the idle state.
Precharge All command
( RAS ="L", CAS = "H", WE = "L", BS0, BS1 = Don’t care, A10 = "H", A0 to A9, A11 = Don’t care)
The Precharge All command precharges all banks simultaneously. Then all banks are switched to
the idle state.
Write command
( RAS = "H", CAS = "L", WE = "L", BS0, BS1 = Bank, A10 = "L", A0 to A8 = Column Address)
The write command performs a Write operation to the bank designated by BS. The write data are
latched at rising edge of CLK. The length of the write data (Burst Length) and column access
sequence (Addressing Mode) must be programmed in the Mode Register at power-up prior to the
Write operation.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| WA-1RVX051-A4 | SNAP ACTING/LIMIT SWITCH |
| WA-1RX12-A4 | SNAP ACTING/LIMIT SWITCH |
| WB3M200VD1R800 | 200 CONTACT(S), MALE, STRAIGHT SINGLE PART CARD EDGE CONN, SURFACE MOUNT, PLUG |
| WB3F200VD1R1000 | 200 CONTACT(S), FEMALE, STRAIGHT SINGLE PART CARD EDGE CONN, SURFACE MOUNT, RECEPTACLE |
| WB3F200VD1 | 200 CONTACT(S), FEMALE, STRAIGHT SINGLE PART CARD EDGE CONN, SURFACE MOUNT, RECEPTACLE |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W987Z6CBN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DRAM |
| W988D2FB | 制造商:WINBOND 制造商全稱:Winbond 功能描述:256Mb Mobile LPSDR |
| W988D2FBJX6E | 制造商:Winbond Electronics Corp 功能描述:IC LPSDR SDRAM 256MBIT 90VFBGA |
| W988D2FBJX6I | 制造商:WINBOND 制造商全稱:Winbond 功能描述:256Mb Mobile LPSDR |
| W988D2FBJX7E | 制造商:Winbond Electronics Corp 功能描述:IC LPSDR SDRAM 256MBIT 90VFBGA |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。