
Prel i m nary -2- November 1997
W9966CF/TF
Video Camera Interface Controller with Compression
Table of Contents
1 GENERAL DESCRIPTION........................................................................................................................4
2 FEATURES..................................................................................................................................................5
3 PIN CONFIGURATION..............................................................................................................................6
4 PIN DESCRIPTION ....................................................................................................................................7
4.1 P
IN
D
ESCRIPTION
.........................................................................................................................................7
4.2 P
IN
L
IST
......................................................................................................................................................9
5 SYSTEM DIAGRAM ................................................................................................................................10
6 BLOCK DIAGRAM..................................................................................................................................11
7 FUNCTIONAL DESCRIPTION ...............................................................................................................12
7.1 CCD I
NTERFACE
........................................................................................................................................12
7.1.1 Input Format Translator (IFT)..........................................................................................................12
7.1.2 Cropping..........................................................................................................................................13
7.1.3 Down-scaling....................................................................................................................................13
7.2 V
IDEO
E
NCODING
E
NGINE
(VEE)...............................................................................................................14
7.2.1 Base Layer Coding...........................................................................................................................15
7.2.2 Enhancement Layer Coding..............................................................................................................15
7.3 PC I
NTERFACE
...........................................................................................................................................16
7.3.1 Negotiation.......................................................................................................................................16
7.3.2 Device ID.........................................................................................................................................16
7.3.3 Device Addressing............................................................................................................................17
7.3.4 Control Register Data Write.............................................................................................................18
7.3.5 Control Register Data Read..............................................................................................................18
7.3.6 CCD Data Transfer (Peripheral to Host Only)..................................................................................18
7.4 M
EMORY
C
ONTROLLER
..............................................................................................................................20
7.4.1 Memory Size and Estimated Performance.........................................................................................20
8 CONTROL AND STATUS REGISTERS.................................................................................................21
8.1 CCD I
NTERFACE
R
EGISTER
D
ESCRIPTIONS
..................................................................................................22
8.2 MCTL R
EGISTER
D
ESCRIPTIONS
................................................................................................................27
8.3 V
IDEO
E
NCODING
E
NGINE
R
EGISTER
D
ESCRIPTIONS
....................................................................................30
8.4 M
ISCELLANEOUS
C
ONTROL
R
EGISTER
D
ESCRIPTIONS
..................................................................................31
9 ELECTRICAL CHARACTERISTICS.....................................................................................................34
9.1 A
BSOLUTE
M
AXIMUM
R
ATINGS
..................................................................................................................34
9.2 DC S
PECIFICATIONS
...................................................................................................................................34
9.3 AC S
PECIFICATIONS
...................................................................................................................................35
9.3.1 Reset Specifications..........................................................................................................................35
9.3.2 Clock Specifications.........................................................................................................................35