參數(shù)資料
型號(hào)： WARP20
廠商： 意法半導(dǎo)體
英文描述： 8-BIT FUZZY CO-PROCESSOR
中文描述： 8位模糊協(xié)處理器
文件頁(yè)數(shù)： 1/28頁(yè)
文件大小： 275K
代理商： WARP20
March 1996
This is advance informationon a new productnow in developmentor undergoingevaluation. Detailsare subject to change without notice.
PLCC68
8
I0-I7
BUSY
OFL
12
O0-O11
2
OC0-OC1
DS
PRESET
VSS
VDD
W.A.R.P.
2.0
LASTIN
MCLK
WAIT
ENDOFL
ERR
OE
AUTO
3
SIS0-SIS2
RD
READY
Figure1. Logic Diagram.
Digital Fuzzy Co-processor 8-bit I/O
HighSpeed Rules Processing
4 Input, 2 Output,32 Rulesin 33.1
μ
s
Upto 256 Rules (4 Antecedents,1 Consequent)
Up to 8Input ConfigurableVariables
Up to 16 MembershipFunctions foran Input
Variable
AntecedentMembership Functions with
Triangular and TrapezoidalShape
Up to 4 Output Variables
Up to 256 Membership Functions for all
Consequents
SingletonConsequentMembership Functions
Defuzzification on chip
Maximum Clock Frequency40MHz
A/D Start Convertion Pulsepresettable
Direct Interfaceto all popular microprocessor
HandshakingSignal Polarity presettable
Operates ”STANDALONE” (without
μ
P) if
desired
Standard+5V SupplyVoltage
SoftwareTools and Emulators Availability
Pinnumber: 52
68-leadPlastic LeadedChip Carrier package.
ANTECEDENT
MEMORY
PROGRAM &
CONSEQUENT
MEMORY
PROGRAMMABLEA/D
OUTPUT PULSE
INTERNALBUS
Input Port
with
HANDSHAKE
8
ALPHA
CALCULATOR
INFERENCE
UNIT
DEFUZZIFIER
Ouput Port
with
HANDSHAKE
8
Figure2. Simplified Block Diagram.
W.A.R.P.2.0
8-BIT FUZZY CO-PROCESSOR
PRELIMINARYDATA
1/28
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