- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄361836 > WEDPY256K72V-XBX SSRAM MCP PDF資料下載
參數(shù)資料
| 型號： | WEDPY256K72V-XBX |
| 英文描述： | SSRAM MCP |
| 中文描述： | 的SSRAM MCP的 |
| 文件頁數(shù)： | 6/12頁 |
| 文件大?。?/td> | 561K |
| 代理商： | WEDPY256K72V-XBX |
6
White Electronic Designs Corporation Phoenix AZ (602) 437-1520
WEDPY 256K 72V-X BX
NOTES:
1. Test conditions as specified withthe output loading as shownintest conditions uness otherwise noted.
2. Ths parameteris measured withoutput load as shownintest conditions.
3. This parameteris not tested.
4. Transition is measured ± 500mV fromsteady state voltage.
5. OE is a “Dont Care” when a byte wrte enable is sampled LOW
6. Measured at HIGH above VIH and LOW below VIL
7. This is a synchronous device. All addresses must meet the specified setup and hold times forall rsing edges of CLK. All othersynchronous inputs must meet the setup
and hold times with stable logic levels forall rsing edges of clock (CLK) when the chip is enabled. Chip enable must be valid at each rsing edge of CLK to remain
enabled.
AC C
HARACTERISTICS
-55°C
≤
TA
≤
+125°C
O
UTPUT
L
OADS
AC Output Load Equivalent
Parameter
Input Pulse Levels
Input Rise and Fall Times
Input Timing Reference Levels
Output Timing Reference Levels
Output Load
2.5V I/O
Vss to 2.5
1
1.25
1.25
See figures, at left
Unit
V
ns
V
V
* Commercial and industral temperatures only.
Symbol 100MHz 133MHz 150MHz 166MHz 200MHz*
Min.
Max
Min
Max
Parameter
Clock
Clock Cycle Time
Clock Frequency
Clock HIGH Time (6)
Clock LOW Time (6)
Output Times
Clock to output valid
Clock to output invalid (2)
Clock to output on Low-Z (2,3,4)
Clock to output in High-Z (2,3,4)
OE to output valid (5)
OE to output in Low-Z (2,3,4)
OE to output in High Z (2,3,4)
Setup Time
Address (6,7)
Write Enable (WE) (7)
Address status, (ADSC, ADSP) (7)
Address advance (ADV) (7)
Data-in (6,7)
Chip enable (CE) (7)
Hold Times
Address (7) (7)
Address status (ADSC, ADSP) (7)
Address advance (ADV) (7)
Write Enable (WE) (7)
Data-in (6,7)
Chip Enable (CS) (7)
Min
Max
Min
Max
Min
Max
Units
tkc
tkf
tkh
tkl
10
7.5
7.0
6.0
5.0
ns
100
133
150
166
200
MHz
ns
ns
3.0
3.0
2.5
2.5
2.5
2.5
2.3
2.3
2.0
2.0
tkq
tkqx
tkqlz
tkqhz
toeq
toelz
toehz
5.0
4.0
3.8
3.5
3.1
ns
ns
ns
ns
ns
ns
ns
1.5
1.5
1.5
0
1.5
0
15
0
1.0
0
5.0
5.0
4.2
4.2
4.0
4.0
3.5
3.5
3.1
3.1
0
0
0
0
0
4.5
4.2
4.0
3.5
3.0
tas
tws
tadss
taas
tds
tces
2.0
2.0
2.0
2.0
2.0
2.0
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
ns
ns
ns
ns
ns
ns
tah
tadsh
taah
twh
tdh
tceh
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
ns
ns
ns
ns
ns
ns
AC T
EST
C
ONDITIONS
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| WEDPZ512K72S-XBX | NBL SSRAM MCP |
| WEDPZ512K72V-XBX | NBL SSRAM MCP |
| WF100 | DC to DC Converter |
| WF100U | DC to DC Converter |
| WF101 | DC to DC Converter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| WEDPZ512K72S-100BC | 制造商:Microsemi Corporation 功能描述:512K X 72 ZBL SSRAM MODULE, 2.5V, 100MHZ, 152 BGA 17MM X 23M - Bulk |
| WEDPZ512K72S-100BI | 制造商:Microsemi Corporation 功能描述:512K X 72 ZBL SSRAM MODULE, 2.5V, 100MHZ, 152 BGA 17MM X 23M - Bulk |
| WEDPZ512K72S-100BM | 制造商:Microsemi Corporation 功能描述:512K X 72 ZBL SSRAM MODULE, 2.5V, 100MHZ, 152 BGA 17MM X 23M - Bulk |
| WEDPZ512K72S-133BC | 制造商:Microsemi Corporation 功能描述:512K X 72 ZBL SSRAM MODULE, 2.5V, 133MHZ, 152 BGA 17MM X 23M - Bulk |
| WEDPZ512K72S-133BI | 制造商:Microsemi Corporation 功能描述:512K X 72 ZBL SSRAM MODULE, 2.5V, 133MHZ, 152 BGA 17MM X 23M - Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。