參數(shù)資料
型號: WF4M32-120G2TC5
廠商: WHITE ELECTRONIC DESIGNS CORP
元件分類: PROM
英文描述: 4M X 32 FLASH 5V PROM MODULE, 120 ns, CQFP68
封裝: 22.40 MM, 4.57 MM HEIGHT, HERMETIC SEALED, CERAMIC, QFP-68
文件頁數(shù): 1/15頁
文件大?。?/td> 631K
代理商: WF4M32-120G2TC5
1
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
WF4M32-XXX5
June 2004
Rev. 6
PRELIMINARY*
I/O8
I/O9
I/O10
A14
A16
A11
A0
A18
I/O0
I/O1
I/O2
RESET#
CS2#
GND
I/O11
A10
A9
A15
VCC
CS1#
A19
I/O3
I/O15
I/O14
I/O13
I/O12
OE#
A17
WE#
I/O7
I/O6
I/O5
I/O4
I/O24
I/O25
I/O26
A7
A12
A21
A13
A8
I/O16
I/O17
I/O18
VCC
CS4#
NC
I/O27
A4
A5
A6
A20
CS3#
GND
I/O19
I/O31
I/O30
I/O29
I/O28
A1
A2
A3
I/O23
I/O22
I/O21
I/O20
11
22
33
44
55
66
1
12
23
34
45
56
FIGURE 1 – PIN CONFIGURATION FOR WF4M32-XH2X5
Top View
4Mx32 5V FLASH MODULE
FEATURES
Access Times of 100, 120, 150ns
Packaging:
66 pin, PGA Type, 1.385" square, Hermetic
Ceramic HIP (Package 402).
68 lead, 40mm Low Prole CQFP (Package
502), 3.5mm (0.140") height.
68 lead, Hermetic CQFP (G2T), 22.4mm (0.880")
square (Package 509) 4.57mm (0.180") height.
Designed to t JEDEC 68 lead 0.990CQFJ
footprint (Fig. 3)
Sector Architecture
32 equal size sectors of 64KBytes per each 2Mx8
chip
Any combination of sectors can be erased. Also
supports full chip erase.
Minimum 100,000 Write/Erase Cycles Minimum
Organized as 4Mx32
Block Diagram
User congurable as 2x4Mx16 or 4x4Mx8 in HIP
and G4T packages.
Commercial, Industrial, and Military Temperature
Ranges
5 Volt Read and Write. 5V ± 10% Supply.
Low Power CMOS
Data# Polling and Toggle Bit feature for detection of
program or erase cycle completion.
Supports reading or programming data to a sector
not being erased.
RESET# pin resets internal state machine to the
read mode.
Built-in Decoupling Caps and Multiple Ground Pins
for Low Noise Operation, Separate Power and
Ground Planes to improve noise immunity
* This product is under development, is not qualied or characterized and is subject to
change without notice.
Note: For programming information refer to Flash Programming 16M5 Application Note.
I/O 0-7
CS1#
CS2#
CS3#
CS4#
I/O 8-15
I/O 16-23
I/O 24-31
OE#
A 0-20
A 21
2M x 8
2Mx 8
2M x 8
WE#
RESET#
PIN DESCRIPTION
I/O0-31
Data Inputs/Outputs
A0-21
Address Inputs
WE#
Write Enable
CS1-4#
Chip Select
OE#
Output Enable
VCC
Power Supply
VSS
Ground
RESET#
Reset
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