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參數資料
| 型號： | WM8722 |
| 廠商： | Wolfson Microelectronics |
| 英文描述： | Stereo DAC with Integrated Tone Generator and Line/Variable Level Outputs |
| 中文描述： | 立體聲DAC，具有集成的音調發(fā)生器和線/變平輸出 |
| 文件頁數： | 6/23頁 |
| 文件大?。?/td> | 438K |
| 代理商： | WM8722 |
WM8722
Advanced Information
WOLFSON MICROELECTRONICS LTD
AI Rev 1.5 May 2000
6
BCKIN
DIN
LRCIN
t
BCH
t
BCL
t
BL
t
LB
t
BCY
t
DS
t
DH
Figure 1. Audio Data Input Timing
Test Conditions
AVDD, DVDD = 5V, AGND, DGND = 0V, T
A
= +25
o
C, fs = 48kHz, SCKI = 256fs unless otherwise stated.
PARAMETER
Audio Data Input Timing Information
BCKIN pulse cycle time
BCKIN pulse width high
BCKIN pulse width low
BCKIN rising edge to
LRCIN edge
LRCIN rising edge to
BCKIN rising edge
DIN setup time
DIN hold time
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
t
BCY
t
BCH
t
BCL
t
BL
100
40
40
20
ns
ns
ns
ns
t
LB
20
ns
t
DS
t
DH
20
20
ns
ns
SCKI
t
SCKIL
t
SCKIH
t
SCKY
Figure 2. System Clock Timing Requirements
Test Conditions
AVDD, DVDD = 5V, AGND, DGND = 0V, T
A
= +25
o
C, fs = 48kHz, SCKI = 256fs unless otherwise stated.
PARAMETER
System Clock Timing Information
System clock pulse width high
System clock pulse width low
System clock cycle time
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
t
SCKIH
t
SCKIL
t
SCKY
10
10
27
ns
ns
ns
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