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參數(shù)資料
| 型號： | WMS512K8-55 |
| 英文描述： | 512Kx8 Monolithic SRAM(512Kx8單片靜態(tài)RAM（存取時間55ns）) |
| 中文描述： | 512Kx8單片的SRAM（512Kx8單片靜態(tài)隨機(jī)存儲器（存取時間55ns）） |
| 文件頁數(shù)： | 3/10頁 |
| 文件大?。?/td> | 114K |
| 代理商： | WMS512K8-55 |
3
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
WMS512K8-XXX
AC CHARACTERISTICS
(V
CC
= 5.0V, GND = 0V, T
A
= -55
°
C to +125
°
C)
Parameter
Symbol
-15
-17
-20
-25
-35
-45
-55
Units
Read Cycle
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Read Cycle Time
Address Access Time
Output Hold from Address Change
Chip Select Access Time
Output Enable to Output Valid
Chip Select to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
1. This parameter is guaranteed by design but not tested.
t
RC
t
AA
t
OH
t
ACS
t
OE
t
CLZ
1
t
OLZ
1
t
CHZ
1
t
OHZ
1
15
17
20
25
35
45
55
ns
ns
ns
ns
ns
ns
ns
ns
ns
15
17
20
25
35
45
55
0
0
0
0
0
0
0
15
8
17
9
20
10
25
12
35
25
45
25
55
25
2
0
2
0
2
0
2
0
4
0
4
0
4
0
8
8
9
9
10
10
12
12
15
15
20
20
20
20
AC CHARACTERISTICS
(V
CC
= 5.0V, GND = 0V, T
A
= -55
°
C to +125
°
C)
Parameter
Write Cycle
Write Cycle Time
Chip Select to End of Write
Address Valid to End of Write
Data Valid to End of Write
Write Pulse Width
Address Setup Time
Address Hold Time
Output Active from End of Write
Write Enable to Output in High Z
Data Hold Time
1. This parameter is guaranteed by design but not tested.
Symbol
-15
-17
-20
-25
-35
-45
-55
Units
Min
15
13
13
8
13
2
0
2
Max
Min
17
14
14
9
14
2
0
2
Max
Min
20
14
14
10
14
2
0
3
Max
Min
25
15
15
10
15
2
0
4
Max
Min
35
25
25
20
25
2
0
4
Max
Min
45
35
35
25
35
2
5
5
Max
Min
55
50
50
25
40
2
5
5
Max
t
WC
t
CW
t
AW
t
DW
t
WP
t
AS
t
AH
t
OW
1
t
WHZ
1
t
DH
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
8
9
9
10
15
20
25
0
0
0
0
0
0
0
I
Current Source
D.U.T.
C = 50 pf
I
OL
V
≈
1.5V
(Bipolar Supply)
Z
Current Source
OH
NOTES:
V
Z
is programmable from -2V to +7V.
I
OL
& I
OH
programmable from 0 to 16mA.
Tester Impedance Z
0
= 75
.
V
Z
is typically the midpoint of V
OH
and V
OL
.
I
OL
& I
OH
are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
AC TEST CIRCUIT
AC TEST CONDITIONS
Parameter
Input Pulse Levels
Input Rise and Fall
Input and Output Reference Level
Output Timing Reference Level
Typ
Unit
V
ns
V
V
V
IL
= 0, V
IH
= 3.0
5
1.5
1.5
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| WMS512K8-70 | 512Kx8 Monolithic SRAM(512Kx8單片靜態(tài)RAM（存取時間70ns）) |
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| WMS512K8-120 | 512Kx8 Monolithic SRAM(512Kx8單片靜態(tài)RAM（存取時間120ns）) |
| WMS512K8-85 | 512Kx8 Monolithic SRAM(512Kx8單片靜態(tài)RAM（存取時間85ns）) |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| WMS512K8-55CC | 制造商:Microsemi Corporation 功能描述:512K X 8 SRAM MONOLITHIC, 5V, 55NS, 32 DIP, COMMERCIAL SCREE - Bulk |
| WMS512K8-55CCA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:512Kx8 MONOLITHIC SRAM |
| WMS512K8-55CI | 制造商:Microsemi Corporation 功能描述:512K X 8 SRAM MONOLITHIC, 5V, 55NS, 32 DIP, INDUSTRIAL SCREE - Bulk |
| WMS512K8-55CIA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:512Kx8 MONOLITHIC SRAM |
| WMS512K8-55CLC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:512Kx8 MONOLITHIC SRAM |
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