參數(shù)資料
型號: X1288V14Z
廠商: INTERSIL CORP
元件分類: XO, clock
英文描述: 2-Wire⑩ RTC Real Time Clock/Calendar/CPU Supervisor with EEPROM
中文描述: 1 TIMER(S), REAL TIME CLOCK, PDSO14
封裝: ROHS COMPLIANT, PLASTIC, TSSOP-14
文件頁數(shù): 5/27頁
文件大小: 425K
代理商: X1288V14Z
5
FN8102.3
April 14, 2006
(3) The device goes into the Timekeeping state 200nS after any stop, except those that initiate a nonvolatile write cycle; t
WC
after a stop
that initiates a nonvolatile write cycle; or 9 clock cycles after any start that is not followed by the correct Device Select Bits in the Slave
Address Byte.
(4) For reference only and not tested.
(5) V
IL
= V
CC
x 0.1, V
IH
= V
CC
x 0.9, f
SCL
= 400KHz
(6) V
CC
= 0V
(7) V
BACK
= 0V
(8) V
SDA
= V
SCL
=V
CC
, Others = GND or V
CC
(9) V
SDA
=V
SCL
=V
BACK
, Others = GND or V
BACK
(10) V
SDA
= GND or V
CC
,
V
SCL
= GND or V
CC
,
V
RESET
= GND or V
CC
(11) I
OL
= 3.0mA at 5.5V, 1.5mA at 2.7V
(12) I
OH
= -1.0mA at 5.5V, -0.4mA at 2.7V
(13) Threshold voltages based on the higher of Vcc or Vback.
(14) Using recommended crystal and oscillator network applied to X1 and X2 (25°C).
(15) Typical values are for T
A
= 25°C
Capacitance
T
A
= 25°C, f = 1.0 MHz, V
CC
= 5V
Notes: (1) This parameter is not 100% tested.
(2) The input capacitance between x1 and x2 pins can be varied between 5pF and 19.75pF by using analog trimming registers
AC CHARACTERISTICS
AC Test Conditions
Symbol
C
OUT(1)
C
IN(1)
Parameter
Max.
10
10
Units
pF
pF
Test Conditions
V
OUT
= 0V
V
IN
= 0V
Output Capacitance (SDA, PHZ/IRQ, RESET)
Input Capacitance (SCL)
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing
Levels
Output Load
V
CC
x 0.1 to V
CC
x 0.9
10ns
V
CC
x 0.5
Standard Output Load
SDA
1533
100pF
5.0V
For V
OL
= 0.4V
and I
OL
= 3 mA
Equivalent AC Output Load Circuit for V
CC
= 5V
1316
5.0V
PHZ/IRQ
100pF
806
FIGURE 1. STANDARD OUTPUT LOAD FOR TESTING THE DEVICE WITH V
CC
= 5.0V
X1288
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