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參數(shù)資料
| 型號： | X25401SM |
| 英文描述： | SPI Serial AUTOSTORE⑩ NOVRAM |
| 中文描述： | SPI串行自動存儲⑩NOVRAM |
| 文件頁數(shù)： | 4/14頁 |
| 文件大小： | 57K |
| 代理商： | X25401SM |
4
X25401
WRITE
The WRITE instruction contains the 4-bit address of
the word to be written. The write instruction is immedi-
ately followed by the 16-bit word to be written.
CS
must
remain LOW during the entire operation.
CS
must go
HIGH before the next rising edge of SCK. If
CS
is
brought HIGH prematurely (after the instruction but
before 16 bits of data are transferred), the instruction
register will be reset and the data that was shifted-in
will be written to RAM.
If
CS
is kept LOW for more than 24 SCK clock cycles
(8-bit instruction plus 16-bit data), the data already
shifted-in will be overwritten.
READ
The READ instruction contains the 4-bit address of the
word to be accessed. Unlike the other six instructions,
I
0
of the instruction word is a “don’t care”. This provides
two advantages. In a design that ties both SI and SO
together, the absence of an eighth bit in the instruction
allows the host time to convert an I/O line from an
output to an input. Secondly, it allows for valid data
output during the ninth SCK clock cycle.
All data bits are clocked by the falling edge of SCK
(refer to Read Cycle Diagram).
LOW POWER MODE
When
CS
is HIGH, non-critical internal devices are
powered-down, placing the device in the standby power
mode, thereby minimizing power consumption.
AUTOSTORE Feature
The AUTOSTORE instruction (ENAS) sets the
“AUTOSTORE enable” latch, allowing the X25401 to
automatically perform a store operation when V
CC
falls
below the AUTOSTORE threshold (V
ASTH
).
WRITE PROTECTION
The X25401 provides two software write protection
mechanisms to prevent inadvertent stores of unknown
data.
Power-Up Condition
Upon power-up the “write enable” and “AUTOSTORE
enable” latches are in the reset state, disabling any
store operation.
Unknown Data Store
The “previous recall” latch must be set after power-up.
It may be set only by performing a software or hard-
ware recall operation, which assures that data in all
RAM locations is valid.
SYSTEM CONSIDERATIONS
Power-Up Recall
The X25401 performs a power-up recall that transfers
the E
2
PROM contents to the RAM array. Although the
data may be read from the RAM array, this recall does
not set the “previous recall” latch. During this power-up
recall operation, all commands are ignored. Therefore,
the host should delay any operations with the X25401
a minimum of t
PUR
after V
CC
is stable.
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| X25642PM-2.7 | CAP,Non-Specified,20uF,10-% Tol,10+% Tol |
| X25642SI-2.7 | Advanced SPI Serial E 2 PROM with Block Lock TM Protection |
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相關(guān)代理商/技術(shù)參數(shù) |
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| X25640 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Advanced SPI Serial E2PROM With Block LockTM Protection |
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| X25642F | 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:Advanced SPI Serial E2PROM with Block Lock Protection |
| X25642FG | 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:Advanced SPI Serial E2PROM with Block Lock Protection |
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