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參數(shù)資料
| 型號： | X40421S14I-C |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | Dual Voltage Monitor with Intergrated CPU Supervisor |
| 中文描述： | 雙電壓監(jiān)視器集成CPU監(jiān)控 |
| 文件頁數(shù)： | 3/25頁 |
| 文件大?。?/td> | 156K |
| 代理商： | X40421S14I-C |
PRELMNARY
the V
CC
supply is fully functional. In the event of a V
CC
failure, the battery voltage is applied to the
V
OUT
pin and the external transistor is turned off. In this “backup condition,” the battery only needs
to supply enough voltage and current to keep SRAM devices from losing their data–there is no
communication at this time.
X40420/X40421 – Preliminary
Characteristics subject to change without notice.
3 of 25
REV 1.2.14 7/12/02
www.xicor.com
4
WDO
WDO Output.
dog timer goes active.
Manual Reset Input.
main HIGH/LOW until the pin is released and for the t
RESET Output.
(X40421) This open drain pin is an active LOW output which goes LOW whenever
V
CC
falls below V
TRIP1
grammed time period (t
PURST
) on power up. It will also stay active until manual reset is released
and for t
PURST
thereafter.
RESET Output.
(X40420) This pin is an active HIGH open drain output which goes HIGH when-
ever V
CC
falls below V
TRIP1
voltage or if manual reset is asserted. This output stays active for the
programmed time period (t
PURST
) on power up. It will also stay active until manual reset is released
and for t
PURST
thereafter.
Ground
Serial Data.
SDA is a bidirectional pin used to transfer data into and out of the device. It has an
open drain output and may be wire ORed with other open drain or open collector outputs. This pin
requires a pull up resistor and the input buffer is always active (not gated).
Watchdog Input.
A HIGH to LOW transition on the SDA (while SCL is toggled from HIGH to LOW
and followed by a stop condition) restarts the Watchdog timer. The absence of this transition within
the watchdog time out period results in WDO going active.
Serial Clock.
The Serial Clock controls the serial bus timing for data input and output.
Write Protect.
WP HIGH prevents writes to any location in the device (including all the registers).
It has an internal pull down resistor. (>10M
typical)
Battery Supply Voltage.
This input provides a backup supply in the event of a failure of the
primary V
CC
voltage. The V
BATT
voltage typically provides the supply voltage necessary to
maintain the contents of SRAM and also powers the internal logic to “stay awake.” If the battery is
not used, connect V
BATT
to ground.
Output Voltage.
(V)
V
OUT
= V
CC
if V
CC
> V
TRIP1
.
IF V
CC
< V
TRIP1
then V
OUT
= V
CC
if V
CC
> V
BATT
+ 0.03V
else V
OUT
= V
BATT
(ie if V
CC
< V
BATT
– 0.03V)
Note:
There is hysteresis around V
BATT
± 0.03V point to avoid oscillation at or near the
switchover voltage. A capacitance of 0.1μF must be connected to V
OUT
to ensure stability.
Battery On.
This CMOS output goes HIGH when the V
OUT
switches to V
BATT
and goes LOW
when V
OUT
switches to V
CC
. It is used to drive an external PNP pass transistor when V
CC
= V
OUT
and current requirements are greater than 50mA.
WDO is an active LOW, open drain output which goes active whenever the watch-
5
MR
Pulling the MR pin LOW initiates a system reset. The RESET/RESET pin will re-
PURST
thereafter. It has an internal pull up resistor.
6
RESET/
RESET
7
8
V
SDA
SS
9
10
SCL
WP
11
V
BATT
12
V
OUT
13
BATT-ON
14
V
CC
Supply Voltage
PIN DESCRIPTION
(Continued)
Pin
Name
Function
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| X40421V14-B | Dual Voltage Monitor with Intergrated CPU Supervisor |
| X40421V14-C | Dual Voltage Monitor with Intergrated CPU Supervisor |
| X40421V14I-A | Dual Voltage Monitor with Intergrated CPU Supervisor |
| X40421V14I-B | Dual Voltage Monitor with Intergrated CPU Supervisor |
| X40421V14I-C | Dual Voltage Monitor with Intergrated CPU Supervisor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X40421S14I-CT1 | 功能描述:IC VOLT MON DUAL SUP/SW 14-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 類型:簡單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:- 復(fù)位:低有效 復(fù)位超時:最小為 100 ms 電壓 - 閥值:4.38V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:8-TSSOP 包裝:管件 |
| X40421S14IZ-AT1 | 制造商:Intersil Corporation 功能描述:PROCESSOR SUPERVISOR 4.6V/2.9V 3000UA 14SOIC - Tape and Reel |
| X40421S14IZ-B | 制造商:Intersil Corporation 功能描述:PROCESSOR SUPERVISOR 4.6V/2.6V 3000UA 14SOIC - Rail/Tube |
| X40421S14IZ-BT1 | 制造商:Intersil Corporation 功能描述:PROCESSOR SUPERVISOR 4.6V/2.6V 3000UA 14SOIC - Tape and Reel |
| X40421S14Z-A | 制造商:Intersil Corporation 功能描述:PROCESSOR SUPERVISOR 4.6V/2.9V 3000UA 14SOIC - Rail/Tube 制造商:Intersil Corporation 功能描述:Supervisory Circuits DL VAGE CPU SUPS LW VTRIP1 4 6 VTRIP2 |
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