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參數(shù)資料
| 型號： | X40421S14I-C |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | Dual Voltage Monitor with Intergrated CPU Supervisor |
| 中文描述： | 雙電壓監(jiān)視器集成CPU監(jiān)控 |
| 文件頁數(shù)： | 4/25頁 |
| 文件大?。?/td> | 156K |
| 代理商： | X40421S14I-C |
X40420/X40421 – Preliminary
Characteristics subject to change without notice.
4 of 25
REV 1.2.14 7/12/02
www.xicor.com
PRINCIPLES OF OPERATION
Power On Reset
Applying power to the X40420/21 activates a Power On
Reset Circuit that pulls the RESET/RESET pins active.
This signal provides several benefits.
– It prevents the system microprocessor from starting
to operate with insufficient voltage.
– It prevents the processor from operating prior to sta-
bilization of the oscillator.
– It allows time for an FPGA to download its configura-
tion prior to initialization of the circuit.
– It prevents communication to the EEPROM, greatly
reducing the likelihood of data corruption on power up.
When V
CC
exceeds the device V
TRIP1
threshold value
for t
PURST
(selectable) the circuit releases the RESET
(X40421) and RESET (X40420) pin allowing the system
to begin operation.
Figure 1. Connecting a Manual Reset Push-Button
Manual Reset
By connecting a push-button directly from MR to
ground, the designer adds manual system reset capa-
bility. The MR pin is LOW while the push-button is
closed and RESET/RESET pin remains LOW for
t
PURST
or till the push-button is released and for t
PURST
thereafter. A weak pull up resistor is connected to the
MR pin.
Low Voltage V1 Monitoring
During operation, the X40420/21 monitors the V
CC
level and asserts RESET if supply voltage falls below a
preset minimum V
TRIP1
. The RESET signal prevents
the microprocessor from operating in a power fail or
brownout condition. The V1FAIL signal remains active
until the voltage drops below 1V. It also remains active
until V
CC
returns and exceeds V
TRIP1
for
t
PURST
.
Low Voltage V2 Monitoring
The X40420/21 also monitors a second voltage level
and asserts V2FAIL if the voltage falls below a preset
minimum V
TRIP2
. The V2FAIL signal is either ORed
with RESET to prevent the microprocessor from oper-
ating in a power fail or brownout condition or used to
interrupt the microprocessor with notification of an
impending power failure. The V2FAIL signal remains
active until the V
CC
drops below 1V (V
CC
falling). It
also remains active until V2MON returns and exceeds
V
TRIP2
.
V2MON voltage monitor is powered by V
OUT.
If V
CC
and V
BATT
go away, V2MON cannot be monitored.
Figure 2. Two Uses of Multiple Voltage Monitoring
WATCHDOG TIMER
The Watchdog Timer circuit monitors the microproces-
sor activity by monitoring the SDA and SCL pins. A
standard read or write sequence to any slave address
byte restarts the watchdog timer and prevents the
WDO signal to go active. A minimum sequence to
reset the watchdog timer requires four microprocessor
instructions namely, a Start, Clock Low, Clock High and
Stop. The state of two nonvolatile control bits in the
Status Register determine the watchdog timer period.
The microprocessor can change these watchdog bits
by writing to the X40420/21 control register.
MR
System
Reset
Manual
Reset
X40420/21
RESET
Unreg.
Supply
V
CC
5V
Reg
V2MON
X40420
Resistors selected so 3V appears on V2MON when unregulated
supply reaches 6V.
Unreg.
Supply
V
CC
X40421
RESET
V2FAIL
System
Reset
V
OUT
RESET
V2FAIL
V
OUT
System
Reset
Notice:
No external components required to monitor two voltages.
R
R
V2MON
5V
Reg
3V
Reg
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| X40421V14-B | Dual Voltage Monitor with Intergrated CPU Supervisor |
| X40421V14-C | Dual Voltage Monitor with Intergrated CPU Supervisor |
| X40421V14I-A | Dual Voltage Monitor with Intergrated CPU Supervisor |
| X40421V14I-B | Dual Voltage Monitor with Intergrated CPU Supervisor |
| X40421V14I-C | Dual Voltage Monitor with Intergrated CPU Supervisor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X40421S14I-CT1 | 功能描述:IC VOLT MON DUAL SUP/SW 14-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 類型:簡單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:- 復(fù)位:低有效 復(fù)位超時:最小為 100 ms 電壓 - 閥值:4.38V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:8-TSSOP 包裝:管件 |
| X40421S14IZ-AT1 | 制造商:Intersil Corporation 功能描述:PROCESSOR SUPERVISOR 4.6V/2.9V 3000UA 14SOIC - Tape and Reel |
| X40421S14IZ-B | 制造商:Intersil Corporation 功能描述:PROCESSOR SUPERVISOR 4.6V/2.6V 3000UA 14SOIC - Rail/Tube |
| X40421S14IZ-BT1 | 制造商:Intersil Corporation 功能描述:PROCESSOR SUPERVISOR 4.6V/2.6V 3000UA 14SOIC - Tape and Reel |
| X40421S14Z-A | 制造商:Intersil Corporation 功能描述:PROCESSOR SUPERVISOR 4.6V/2.9V 3000UA 14SOIC - Rail/Tube 制造商:Intersil Corporation 功能描述:Supervisory Circuits DL VAGE CPU SUPS LW VTRIP1 4 6 VTRIP2 |
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