參數(shù)資料
型號: X40431S14IZ-B
廠商: INTERSIL CORP
元件分類: 電源管理
英文描述: Triple Voltage Monitor with Integrated CPU Supervisor
中文描述: 3-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO14
封裝: 0.150 INCH, ROHS COMPLIANT, SOIC-14
文件頁數(shù): 22/26頁
文件大小: 399K
代理商: X40431S14IZ-B
22
FN8251.1
May 24, 2006
Power Fail Timings
RESET/RESET/MR Timings
LOW VOLTAGE AND WATCHDOG TIMINGS PARAMETERS (@25°C, V
CC
= 5V)
V2MON or
V3MON
[
[
V2FAIL or
V3FAIL
t
R
t
F
t
RPDX
V
RVALID
LOWLINE or
V
CC
V
TRIPX
t
RPDX
t
RPDX
t
RPDL
t
RPDL
t
RPDL
X = 2, 3
]
]
Symbol
t
RPD1(2)
t
RPDL
t
LR
t
RPDX(2)
t
PURST
Parameters
Min
Typ
(1)
Max
5
Unit
μs
V
TRIP1
to RESET/RESET (Power-down only)
V
TRIP1
to LOWLINE
LOWLINE to RESET/RESET delay (Power-down only) [= t
RPD1
-t
RPDL
]
V
TRIP2
to V2FAIL, or V
TRIP3
to V3FAIL (x = 2, 3)
Power-on Reset delay:
PUP1 = 0, PUP0 = 0
PUP1 = 0, PUP0 = 1 (factory setting)
PUP1 = 1, PUP0 = 0
PUP1 = 1, PUP0 = 1
500
ns
μs
5
50
(2)
200
400
(2)
800
(2)
ms
ms
ms
ms
t
F
t
R
V
CC,
V2MON
,
V3MON
,
Fall Time
V
CC,
V2MON
,
V3MON
,
Rise Time
Reset Valid V
CC
MR to RESET/ RESET delay (activation only)
20
20
1
500
mV
/
μs
mV
/
μs
V
ns
V
RVALID
t
MD(2)
V
CC
V
TRIP1
RESET
RESET
t
PURST
t
PURST
t
R
t
F
t
RPD1
V
RVALID
MR
t
MD
t
IN1
X40430, X40431, X40434, X40435
相關PDF資料
PDF描述
X40431S14Z-A Triple Voltage Monitor with Integrated CPU Supervisor
X40431S14Z-B Triple Voltage Monitor with Integrated CPU Supervisor
X40431V14IZ-B Triple Voltage Monitor with Integrated CPU Supervisor
X40431V14Z-A Triple Voltage Monitor with Integrated CPU Supervisor
X40431V14Z-B Triple Voltage Monitor with Integrated CPU Supervisor
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