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參數(shù)資料
| 型號： | X84041VI2.7 |
| 英文描述： | Serial EEPROM |
| 中文描述： | 串行EEPROM |
| 文件頁數(shù)： | 2/13頁 |
| 文件大?。?/td> | 137K |
| 代理商： | X84041VI2.7 |
X84041
Characteristics subject to change without notice.
2 of 13
REV 1.0 6/29/00
www.xicor.com
PIN NAMES
PIN CONFIGURATION
A Write Protect (WP) pin provides hardware protection
against inadvertent writes to the memory.
Xicor EEPROMs are designed and tested for applica-
tions requiring extended endurance. Inherent data
retention is greater than 100 years.
PIN DESCRIPTIONS
Chip Enable (CE)
The Chip Enable input must be LOW to enable all read/
write operations. When CE is HIGH, the chip is dese-
lected, the I/O pin is in the high impedance state, and
unless a nonvolatile write operation is underway, the
X84041 is in the standby power mode.
Output Enable (OE)
The Output Enable input must be LOW to enable the
output buffer and to read data from the X84041 on the
I/O line.
Write Enable (WE)
The Write Enable input must be LOW to write either
data or command sequences to the X84041.
Data In/Data Out (I/O)
Data and command sequences are serially written to
or serially read from the X84041 through the I/O pin.
Write Protect (WP)
When the Write Protect input is LOW, nonvolatile writes
to the X84041 are disabled. When WP is HIGH, all
functions, including nonvolatile writes, operate nor-
mally. If a nonvolatile write cycle is in progress, WP
going LOW will have no effect on the cycle already
underway, but will inhibit any additional nonvolatile
write cycles.
DEVICE OPERATION
The X84041 is a serial 512 x 8 bit EEPROM designed
to interface directly with most microprocessor buses.
Standard CE, OE, and WE signals control the read and
write operations, and a single l/O line is used to send
and receive data and commands serially.
Data Timing
Data input on the l/O line is latched on the rising edge
of either WE or CE, whichever occurs first. Data output
on the l/O line is active whenever both OE and CE are
LOW. Care should be taken to ensure that WE and OE
are never both LOW while CE is LOW.
Read Sequence
A read sequence consists of sending a 16-bit address
followed by the reading of data serially. The address is
written by issuing 16 separate write cycles (WE and
CE LOW, OE HIGH) to the part without a read cycle
between the write cycles. The address is sent serially,
most significant bit first, over the I/O line. Note that this
sequence is fully static, with no special timing restric-
tions, and the processor is free to perform other tasks
on the bus whenever the X84041 CE pin is HIGH.
Once the 16 address bits are sent, a byte of data can
be read on the I/O line by issuing 8 separate read
cycles (OE and CE LOW, WE HIGH). At this point,
issuing a reset sequence will terminate the read
sequence, otherwise the X84041 will await further
reads in the sequential read mode.
I/O
CE
OE
WE
WP
V
CC
V
SS
NC
Data Input/Output
Chip Enable Input
Output Enable Input
Write Enable Input
Write Protect Input
Supply Voltage
Ground
No Connect
TSSOP
NC
NC
WP
1
2
3
4
5
7
6
X8401
V
SS
NC
NC
NC
OE
WE
NC
8
9
10
11
12
14
13
DIP/SOIC
V
CC
NC
OE
WE
CE
I/O
WP
1
2
3
4
6
5
7
8
X8401
V
SS
CE
I/O
V
CC
NC
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| X84041VI | Micro Port Saver E2PROM |
| X84041PI-2.7 | Micro Port Saver E2PROM |
| X84041SI-2.7 | Micro Port Saver E2PROM |
| X84041SI-3 | Micro Port Saver E2PROM |
| X84041VI-2.7 | Micro Port Saver E2PROM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X84041VI-3 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Micro Port Saver E2PROM |
| X84128 | 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:Advanced MPS⑩ Micro Port Saver EEPROM with Block Lock⑩ Protection |
| X84128-1.8 | 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:Advanced MPS⑩ Micro Port Saver EEPROM with Block Lock⑩ Protection |
| X84128-2.5 | 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:Advanced MPS⑩ Micro Port Saver EEPROM with Block Lock⑩ Protection |
| X84128E | 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:Advanced MPS⑩ Micro Port Saver EEPROM with Block Lock⑩ Protection |
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