參數(shù)資料
型號(hào)： X9221AYSZ
廠商： Intersil
文件頁(yè)數(shù)： 2/15頁(yè)
文件大?。?/td> 0K
描述： IC XDCP DUAL 2K 2-WIRE 20-SOIC
標(biāo)準(zhǔn)包裝： 35
系列： XDCP™
接片： 64
電阻（歐姆）： 2k
電路數(shù)： 2
溫度系數(shù)： 標(biāo)準(zhǔn)值 ±300 ppm/°C
存儲(chǔ)器類(lèi)型： 非易失
接口： I²C（設(shè)備位址）
電源電壓： 4.5 V ~ 5.5 V
工作溫度： 0°C ~ 70°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 20-SOIC（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 20-SOIC W
包裝： 管件
10
FN8163.2
August 30, 2006
D.C. OPERATING CHARACTERISTICS (Over recommended operating conditions unless otherwise stated.)
Notes: (1) Absolute Linearity is utilized to determine actual wiper voltage versus expected voltage as determined by wiper position when used as
a potentiometer.
(2) Relative Linearity is utilized to determine the actual change in voltage between two successive tap positions when used as a potenti-
ometer. It is a measure of the error in step size.
(3) MI = RTOT/63 or (VH/RH–VL/RL)/63, single pot
ENDURANCE AND DATA RETENTION
CAPACITANCE
POWER-UP TIMING
Notes: (5) This parameter is periodically sampled and not 100% tested.
(6) tPUR and tPUW are the delays required from the time VCC is stable until the specified operation can be initiated. These parameters are
periodically sampled and not 100% tested.
Power Up Requirements (Power up sequencing can affect correct recall of the wiper registers)
The preferred power-on sequence is as follows: First VCC, then the potentiometer pins. It is suggested that VCC
reach 90% of its final value before power is applied to the potentiometer pins. The VCC ramp rate specification should
be met, and any glitches or slope changes in the VCC line should be held to <100mV if possible. Also, VCC should not
reverse polarity by more than 0.5V.
Symbol
Parameter
Limits
Test Conditions
Min. Typ.
Max.
Unit
lCC
Supply Current (Active)
3
mA
fSCL = 100kHz, SDA = Open, Other Inputs = VSS
ISB
VCC Current (Standby)
200
500
A
SCL = SDA = VCC, Addr. = VSS
ILI
Input Leakage Current
10
A
VIN = VSS to VCC
ILO
Output Leakage Current
10
A
VOUT = VSS to VCC
VIH
Input HIGH Voltage
2
VCC + 1
V
VIL
Input LOW Voltage
-1
0.8
V
VOL
Output LOW Voltage
0.4
V
IOL = 3mA
Parameter
Min.
Unit
Minimum endurance
100,000
Data changes per bit per register
Data retention
100
years
Symbol
Parameter
Max.
Unit
Test Conditions
CI/O(5)
Input/output capacitance (SDA)
8
pF
VI/O = 0V
CIN(5)
Input capacitance (A0, A1, A2, A3 and SCL)
6
pF
VIN = 0V
Symbol
Parameter
Min.
Max.
Unit
tPUR(6)
Power-up to initiation of read operation
1
ms
tPUW(6)
Power-up to initiation of write operation
5
ms
tRVCC
VCC Power-up ramp rate
0.2
50
V/ms
X9221A
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