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參數(shù)資料
| 型號： | X9251UV24I |
| 廠商： | INTERSIL CORP |
| 元件分類： | 數(shù)字電位計 |
| 英文描述： | Single Supply/Low Power/256-Tap/SPI Bus |
| 中文描述： | QUAD 50K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 256 POSITIONS, PDSO24 |
| 封裝： | 4.40 MM, TSSOP-24 |
| 文件頁數(shù)： | 5/25頁 |
| 文件大?。?/td> | 549K |
| 代理商： | X9251UV24I |
X9251
Characteristics subject to change without notice.
5 of 25
REV 1.3.3 2/10/04
www.xicor.com
PIN DESCRIPTIONS
Bus Interface Pins
S
ERIAL
O
UTPUT
(SO)
SO is a serial data output pin. During a read cycle,
data is shifted out on this pin. Data is clocked out by
the falling edge of the serial clock.
S
ERIAL
I
NPUT
(SI)
SI is the serial data input pin. All opcodes, byte
addresses and data to be written to the device
registers are input on this pin. Data is latched by the
rising edge of the serial clock.
S
ERIAL
C
LOCK
(SCK)
The SCK input is used to clock data into and out of the
X9251.
H
OLD
(HOLD)
HOLD is used in conjunction with the CS pin to select
the device. Once the part is selected and a serial
sequence is underway, HOLD may be used to pause
the serial communication with the controller without
resetting the serial sequence. To pause, HOLD must
be brought LOW while SCK is LOW. To resume
communication, HOLD is brought HIGH, again while
SCK is LOW. If the pause feature is not used, HOLD
should be held HIGH at all times.
D
EVICE
A
DDRESS
(A1–A0)
The address inputs are used to set the two least
significant bits of the slave address. A match in the
slave address serial data stream must be made with
the address input in order to initiate communication
with the X9251. Device pins A1-A0 must be tie to a
logic level which specify the internal address of the
device, see Figures 2, 3, 4, 5 and 6.
C
HIP
S
ELECT
(CS)
When CS is HIGH, the X9251 is deselected and the
SO pin is at high impedance, and (unless an internal
write cycle is underway) the device is in the standby
state. CS LOW enables the X9251, placing it in the
active power mode. It should be noted that after a
power-up, a HIGH to LOW transition on CS is required
prior to the start of any operation.
Potentiometer Pins
R
H
, R
L
The R
H
and R
L
pins are equivalent to the terminal
connections on a mechanical potentiometer. Since
there are 4 potentiometers, there are 4 sets of R
H
and
R
L
such that R
H0
and R
L0
are the terminals of DCP0
and so on.
R
W
The wiper pin are equivalent to the wiper terminal of a
mechanical
potentiometer.
potentiometers, there are 4 sets of R
W
such that R
W0
is the terminals of DCP0 and so on.
Since
there
are
4
Supply Pins
S
YSTEM
S
UPPLY
V
OLTAGE
(V
CC
)
AND
S
UPPLY
G
ROUND
(V
SS
)
The V
CC
pin is the system supply voltage. The V
SS
pin
is the system ground.
Other Pins
N
O
C
ONNECT
No connect pins should be left floating. This pins are
used for Xicor manufacturing and testing purposes.
H
ARDWARE
W
RITE
P
ROTECT
I
NPUT
(WP)
The WP pin when LOW prevents non-volatile writes to
the Data Registers.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| X9251UV24I-2.7 | Single Supply/Low Power/256-Tap/SPI Bus |
| X9251UV24IZ | SCR Thyristor; Thyristor Type:Standard Gate; Peak Repetitive Off-State Voltage, Vdrm:400V; On State RMS Current, IT(rms):55A; Peak Non Repetitive Surge Current, Itsm:700A; Gate Trigger Current Max, Igt:35mA RoHS Compliant: Yes |
| X9251UV24IZ-2.7 | SCR Thyristor; Thyristor Type:Standard Gate; Peak Repetitive Off-State Voltage, Vdrm:600V; On State RMS Current, IT(rms):55A; Peak Non Repetitive Surge Current, Itsm:700A; Gate Trigger Current Max, Igt:35mA RoHS Compliant: Yes |
| X9251UV24Z-2.7 | OSC 5V SMT PLAS 14X9 CMOS |
| X9251TV24Z-2.7 | OSC 5V SMT PLAS 14X9 CMOS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X9251UV24I-2.7 | 功能描述:IC XDCP QUAD 256TAP 50K 24-TSSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 標(biāo)準(zhǔn)包裝:2,500 系列:XDCP™ 接片:256 電阻（歐姆）:100k 電路數(shù):1 溫度系數(shù):標(biāo)準(zhǔn)值 ±300 ppm/°C 存儲器類型:非易失 接口:I²C（設(shè)備位址） 電源電壓:2.7 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:14-TSSOP 包裝:帶卷 (TR) |
| X9251UV24IZ | 功能描述:IC XDCP QUAD 256TAP 50K 24-TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 接片:256 電阻（歐姆）:100k 電路數(shù):2 溫度系數(shù):標(biāo)準(zhǔn)值 35 ppm/°C 存儲器類型:易失 接口:6 線串行（芯片選擇，遞增，增/減） 電源電壓:2.6 V ~ 5.5 V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:14-TSSOP 包裝:帶卷 (TR) |
| X9251UV24IZ-2.7 | 功能描述:數(shù)字電位計 IC QD DCP 50KOHM 256 TAPS SPI RoHS:否 制造商:Maxim Integrated 電阻:200 Ohms 溫度系數(shù):35 PPM / C 容差:25 % POT 數(shù)量:Dual 每 POT 分接頭:256 弧刷存儲器:Volatile 緩沖刷: 數(shù)字接口:Serial (3-Wire, SPI) 描述/功能:Dual Volatile Low Voltage Linear Taper Digital Potentiometer 工作電源電壓:1.7 V to 5.5 V 電源電流:27 uA 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFN-16 封裝:Reel |
| X9251UV24IZ-2.7T1 | 功能描述:IC XDCP QUAD 256TP 50K 24-TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 接片:256 電阻（歐姆）:100k 電路數(shù):2 溫度系數(shù):標(biāo)準(zhǔn)值 35 ppm/°C 存儲器類型:易失 接口:6 線串行（芯片選擇，遞增，增/減） 電源電壓:2.6 V ~ 5.5 V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:14-TSSOP 包裝:帶卷 (TR) |
| X9251UV24Z | 功能描述:IC XDCP QUAD 256TAP 50K 24-TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 接片:256 電阻（歐姆）:100k 電路數(shù):2 溫度系數(shù):標(biāo)準(zhǔn)值 35 ppm/°C 存儲器類型:易失 接口:6 線串行（芯片選擇，遞增，增/減） 電源電壓:2.6 V ~ 5.5 V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:14-TSSOP 包裝:帶卷 (TR) |
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