參數(shù)資料
型號: X9251UV24IZ-2.7
廠商: INTERSIL CORP
元件分類: 數(shù)字電位計
英文描述: SCR Thyristor; Thyristor Type:Standard Gate; Peak Repetitive Off-State Voltage, Vdrm:600V; On State RMS Current, IT(rms):55A; Peak Non Repetitive Surge Current, Itsm:700A; Gate Trigger Current Max, Igt:35mA RoHS Compliant: Yes
中文描述: QUAD 50K DIGITAL POTENTIOMETER, INCREMENT/DECREMENT CONTROL INTERFACE, 256 POSITIONS, PDSO24
封裝: 4.40 MM, ROHS COMPLIANT, TSSOP-24
文件頁數(shù): 17/25頁
文件大小: 549K
代理商: X9251UV24IZ-2.7
X9251
Characteristics subject to change without notice.
17 of 25
REV 1.3.3 2/10/04
www.xicor.com
EQUIVALENT A.C. LOAD CIRCUIT
AC TIMING
Symbol
f
SCK
t
CYC
t
WH
t
WL
t
LEAD
t
LAG
t
SU
t
H
t
RI
t
FI
t
DIS
t
V
t
HO
t
RO
t
FO
t
HOLD
t
HSU
t
HH
t
HZ
t
LZ
T
I
t
CS
t
WPASU
t
WPAH
Parameter
Min.
Max.
2
Units
MHz
ns
ns
ns
ns
ns
ns
ns
μ
s
μ
s
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
μ
s
ns
ns
SPI clock frequency
SPI clock cycle rime
SPI clock high rime
SPI clock low time
Lead time
Lag time
SI, SCK, HOLD and CS input setup time
SI, SCK, HOLD and CS input hold time
SI, SCK, HOLD and CS input rise time
SI, SCK, HOLD and CS input fall time
SO output disable time
SO output valid time
SO output hold time
SO output rise time
SO output fall time
HOLD time
HOLD setup time
HOLD hold time
HOLD low to output in high Z
HOLD high to output in low Z
Noise suppression time constant at SI, SCK, HOLD and CS inputs
CS deselect time
WP, A0 setup time
WP, A0 hold time
500
200
200
250
250
50
50
2
2
0
250
200
0
100
100
400
100
100
100
100
10
2
0
0
R
H
10pF
C
L
C
L
10pF
R
W
R
TOTAL
C
W
25pF
R
L
SPICE Macromodel
V
CC
2k
10pF
SO pin
2k
相關(guān)PDF資料
PDF描述
X9251UV24Z-2.7 OSC 5V SMT PLAS 14X9 CMOS
X9251TV24Z-2.7 OSC 5V SMT PLAS 14X9 CMOS
X9251TV24I-2.7 Single Supply/Low Power/256-Tap/SPI Bus
X9251TV24-2.7 Single Supply/Low Power/256-Tap/SPI Bus
X9251 Single Supply/Low Power/256-Tap/SPI Bus
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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