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參數(shù)資料
| 型號(hào)： | X9258 |
| 廠商： | Intersil Corporation |
| 英文描述： | Low Noise/Low Power/2-Wire Bus/256 Taps |
| 中文描述： | 低噪音/低Power/2-Wire Bus/256絲錐 |
| 文件頁數(shù)： | 15/22頁 |
| 文件大?。?/td> | 413K |
| 代理商： | X9258 |
X9258
Characteristics subject to change without notice.
15 of 22
REV 1.1.7 2/4/03
www.xicor.com
DCP TIMING
Note:
(8) A device must internally provide a hold time of at least 300ns for the SDA signal in order to bridge the undefined region of the falling
edge of SCL.
TIMING DIAGRAMS 2-WIRE INTERFACE
START and STOP Timing
Input Timing
Output Timing
Symbol
t
WRPO
t
WRL
t
WRID
Parameter
Min.
Max.
10
10
10
Unit
μs
μs
μs
Wiper response time after the third (last) power supply is stable
Wiper response time after instruction issued (all load instructions)
Wiper response time from an active SCL/SCK edge (increment/decrement instruction)
t
SU:STA
t
HD:STA
t
SU:STO
SCL
SDA
t
R
(START)
(STOP)
t
F
t
R
t
F
SCL
SDA
t
HIGH
t
LOW
t
CYC
t
HD:DAT
t
SU:DAT
t
BUF
SCL
SDA
t
DH
t
AA
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| X9258TS24I-2.7 | Low Noise/Low Power/2-Wire Bus/256 Taps |
| X9258TV24 | Low Noise/Low Power/2-Wire Bus/256 Taps |
| X9258TV24-2.7 | Low Noise/Low Power/2-Wire Bus/256 Taps |
| X9258TV24I | Low Noise/Low Power/2-Wire Bus/256 Taps |
| X9258TV24I-2.7 | Low Noise/Low Power/2-Wire Bus/256 Taps |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X9258)06 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Quad Digital Controlled Potentiometers |
| X9258_11 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Quad Digital Controlled Potentiometers(XDCP?) |
| X9258_13 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Low Noise/Low Power/2-Wire Bus/256 Taps |
| X9258TB24 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Quad Digital Controlled Potentiometers (XDCP) |
| X9258TB24-2.7 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Quad Digital Controlled Potentiometers (XDCP) |
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