參數(shù)資料
型號(hào): X9258
廠商: Intersil Corporation
英文描述: Low Noise/Low Power/2-Wire Bus/256 Taps
中文描述: 低噪音/低Power/2-Wire Bus/256絲錐
文件頁(yè)數(shù): 4/22頁(yè)
文件大?。?/td> 413K
代理商: X9258
X9258
Characteristics subject to change without notice.
4 of 22
REV 1.1.7 2/4/03
www.xicor.com
Figure 1. Slave Address
The next four bits of the slave address are the device
address. The physical device address is defined by the
state of the A0-A3 inputs. The X9258 compares the
serial data stream with the address input state; a
successful compare of all four address bits is required
for the X9258 to respond with an acknowledge. The
A
0
–A
3
inputs can be actively driven by CMOS input
signals or tied to V
CC
or V
SS
.
Acknowledge Polling
The disabling of the inputs, during the internal
nonvolatile write operation, can be used to take
advantage of the typical 5ms nonvolatile write cycle
time. Once the stop condition is issued to indicate the
end of the nonvolatile write command the X9258
initiates the internal write cycle. ACK polling can be
initiated immediately. This involves issuing the start
condition followed by the device slave address. If the
X9258 is still busy with the write operation no ACK will
be returned. If the X9258 has completed the write
operation an ACK will be returned and the master can
then proceed with the next operation.
ACK Polling Sequence
Instruction Structure
The next byte sent to the X9258 contains the
instruction and register pointer information. The four
most significant bits are the instruction. The next four
bits point to one of the two pots and when applicable
they point to one of four associated registers. The
format is shown below in Figure 2.
1
0
0
A3
A2
A1
A0
Device Type
Identifier
Device Address
1
Nonvolatile Write
Command Completed
EnterACK Polling
Issue
START
Issue Slave
Address
ACK
Returned
Further
Operation
Issue
Instruction
Issue STOP
No
Yes
Yes
Proceed
Issue STOP
No
Proceed
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