- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371284 > X9269 Dual Digitally-Controlled Potentiometers PDF資料下載
參數(shù)資料
| 型號： | X9269 |
| 元件分類： | 數(shù)字電位計 |
| 英文描述： | Dual Digitally-Controlled Potentiometers |
| 中文描述： | 雙數(shù)字控制電位器 |
| 文件頁數(shù)： | 6/25頁 |
| 文件大小： | 422K |
| 代理商： | X9269 |
X9269
REV 1.1.11 2/17/03
Characteristics subject to change without notice.
6 of 25
www.xicor.com
SERIAL INTERFACE DESCRIPTION
Serial Interface
The X9269 supports a bidirectional bus oriented
protocol. The protocol defines any device that sends
data onto the bus as a transmitter and the receiving
device as the receiver. The device controlling the
transfer is a master and the device being controlled is
the slave. The master will always initiate data transfers
and provide the clock for both transmit and receive
operations. Therefore, the X9269 will be considered a
slave device in all applications.
Clock and Data Conventions
Data states on the SDA line can change only during
SCL LOW periods. SDA state changes during SCL
HIGH are reserved for indicating start and stop
conditions. See Figure 2.
Start Condition
All commands to the X9269 are preceded by the start
condition, which is a HIGH to LOW transition of SDA
while SCL is HIGH. The X9269 continuously monitors
the SDA and SCL lines for the start condition and will
not respond to any command until this condition is met.
See Figure 2.
Stop Condition
All communications must be terminated by a stop
condition, which is a LOW to HIGH transition of SDA
while SCL is HIGH. See Figure 2.
Acknowledge
Acknowledge is a software convention used to provide
a positive handshake between the master and slave
devices on the bus to indicate the successful receipt of
data. The transmitting device, either the master or the
slave, will release the SDA bus after transmitting eight
bits. The master generates a ninth clock cycle and
during this period the receiver pulls the SDA line LOW
to acknowledge that it successfully received the eight
bits of data.
The X9269 will respond with an acknowledge after
recognition of a start condition and its slave address
and once again after successful receipt of the
command byte. If the command is followed by a data
byte the X9269 will respond with a final acknowledge.
See Figure 2.
Figure 2. Acknowledge Response from Receiver
SCL FROM
MASTER
DATA
OUTPUT
FROM
TRANSMITTER
1
8
9
DATA
OUTPUT
FROM
RECEIVER
START
ACKNOWLEDGE
相關PDF資料 |
PDF描述 |
|---|---|
| X9269TS24 | Single Supply/Low Power/256-Tap/2-Wire Bus |
| X9269TS24-2.7 | Single Supply/Low Power/256-Tap/2-Wire Bus |
| X9269TV24 | Single Supply/Low Power/256-Tap/2-Wire Bus |
| X9269UV24 | Single Supply/Low Power/256-Tap/2-Wire Bus |
| X9269UV24-2.7 | Single Supply/Low Power/256-Tap/2-Wire Bus |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| X9269_07 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Dual Digitally-Controlled Potentiometers |
| X9269TB16 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Dual Digitally-Controlled Potentiometers |
| X9269TB16-2.7 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Dual Digitally-Controlled Potentiometers |
| X9269TB16I | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Dual Digitally-Controlled Potentiometers |
| X9269TB16I-2.7 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Dual Digitally-Controlled Potentiometers |
發(fā)布緊急采購，3分鐘左右您將得到回復。