參數(shù)資料
型號: X9408WS24Z
廠商: INTERSIL CORP
元件分類: 數(shù)字電位計(jì)
英文描述: QUAD 10K DIGITAL POTENTIOMETER, 2-WIRE SERIAL CONTROL INTERFACE, 64 POSITIONS, PDSO24
封裝: 0.300 INCH, GREEN, PLASTIC, SOIC-24
文件頁數(shù): 23/32頁
文件大小: 625K
代理商: X9408WS24Z
3
FN8191.3
December 9, 2005
PIN DESCRIPTIONS
Host Interface Pins
Serial Clock (SCL)
The SCL input is used to clock data into and out of the
X9408.
Serial Data (SDA)
SDA is a bidirectional pin used to transfer data into
and out of the device. It is an open drain output and
may be wire-ORed with any number of open drain or
open collector outputs. An open drain output requires
the use of a pull-up resistor. For selecting typical
values, refer to the guidelines for calculating typical
values on the bus pull-up resistors graph.
Device Address (A0 - A3)
The address inputs are used to set the least significant
4 bits of the 8-bit slave address. A match in the slave
address serial data stream must be made with the
address input in order to initiate communication with
the X9408. A maximum of 16 devices may occupy the
2-wire serial bus.
Potentiometer Pins
VH/RH (VH0/RH0 - VH3/RH3), VL/RL (VL0/RL0 - VL3/RL3)
The VH/RH and VL/RL inputs are equivalent to the
terminal connections on either end of a mechanical
potentiometer.
VW/RW (VW0/RW0 – VW3/RW3)
The wiper outputs are equivalent to the wiper output of
a mechanical potentiometer.
Hardware Write Protect Input (WP)
The WP pin when low prevents nonvolatile writes to
the Data Registers.
Analog Supplies V+, V-
The Analog Supplies V+, V- are the supply voltages
for the XDCP analog section.
PIN NAMES
PIN CONFIGURATION
Symbol
Description
SCL
Serial Clock
SDA
Serial Data
A0-A3
Device Address
VH0/RH0 - VH3/RH3,
VL0/RL0 - VL3/RL3
Potentiometer Pins
(terminal equivalent)
VW0/RW0 - VW3/RW3
Potentiometer Pins
(wiper equivalent)
WP
Hardware Write Protection
V+,V-
Analog Supplies
VCC
System Supply Voltage
VSS
System Ground
NC
No Connection
VCC
VL0/RL0
VH0/RH0
WP
SDA
A1
1
2
3
4
5
6
7
8
9
10
24
23
22
21
20
19
18
17
16
15
V+
VL3/RL3
VH3/RH3
VW3/RW3
A0
NC
A3
SCL
VL2/RL2
VH2/RH2
DIP/SOIC
X9408
V
SS
VW0/RW0
14
13
11
12
A2
VL1/RL1
VH1/RH1
VW1/RW1
VW2/RW2
V-
SDA
A1
VH2/RH2
1
2
3
4
5
6
7
8
9
10
24
23
22
21
20
19
18
17
16
15
WP
A2
VW0/RW0
VCC
V+
VL3/RL3
VH3/RH3
VW3/RW3
TSSOP
X9408
VW2/RW2
14
13
11
12
A3
VL1/RL1
VH1/RH1
VW1/RW1
A0
NC
VH0/RH0
V-
SCL
VL2/RL2
VL0/RL0
VSS
X9408
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