參數(shù)資料
型號: X9421WSI
廠商: INTERSIL CORP
元件分類: 數(shù)字電位計
英文描述: 10K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 64 POSITIONS, PDSO16
封裝: 0.300 INCH, PLASTIC, SOIC-16
文件頁數(shù): 5/21頁
文件大?。?/td> 357K
代理商: X9421WSI
13
FN8196.0
March 8, 2005
D.C. OPERATING CHARACTERISTICS (Over the recommended operating conditions unless otherwise specified.)
ENDURANCE AND DATA RETENTION
CAPACITANCE
POWER-UP TIMING
POWER-UP REQUIREMENTS (Power-up sequencing can affect correct recall of the wiper registers)
The preferred power-on sequence is as follows: First VCC and then the potentiometer pins, RH, RL, and RW. Voltage
should not be applied to the potentiometer pins before VCC is applied. The VCC ramp rate specification should be
met, and any glitches or slope changes in the VCC line should be held to <100mV if possible. Also, VCC should not
reverse polarity by more than 0.5V. Recall of wiper position will not be complete until VCC reaches its final value.
Notes: (5)
This parameter is periodically sampled and not 100% tested.
A.C. TEST CONDITIONS
Symbol
Parameter
Limits
Test Conditions
Min.
Typ.
Max.
Units
ICC1
VCC Supply Current
(Active)
400
A
fSCK = 2MHz, SO = Open,
Other Inputs = VSS
ICC2
VCC Supply Current
(Non-volatile Write)
1mA
fSCK = 2MHz, SO = Open,
Other Inputs = VSS
ISB
VCC Current (Standby)
1
A
SCK = SI = VSS, Addr. = VSS
ILI
Input Leakage Current
10
AV
IN = VSS to VCC
ILO
Output Leakage Current
10
AV
OUT = VSS to VCC
VIH
Input HIGH Voltage
VCC x 0.7
VCC + 0.5
V
VIL
Input LOW Voltage
-0.5
VCC x 0.1
V
VOL
Output LOW Voltage
0.4
V
IOL = 3mA
Parameter
Min.
Units
Minimum Endurance
100,000
Data Changes per Bit per Register
Data Retention
100
Years
Symbol
Test
Max.
Units
Test Conditions
COUT
(5)
Output Capacitance (SO)
8
pF
VOUT = 0V
CIN
(5)
Input Capacitance (A0, SI, and SCK)
6
pF
VIN = 0V
Symbol
Parameter
Max.
Units
tRVCC
(5)
VCC Power-up Ramp
0.2
50
V/msec
Input pulse levels
VCC x 0.1 to VCC x
0.9
Input rise and fall times
10ns
Input and output timing level
VCC x 0.5
X9421
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