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參數(shù)資料
| 型號(hào)： | X9430WV24-2.7 |
| 廠商： | Intersil |
| 文件頁數(shù)： | 16/21頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DUAL DCP + OPAMP 10K 24TSSOP |
| 標(biāo)準(zhǔn)包裝： | 75 |
| 系列： | XDCP™ |
| 接片： | 64 |
| 電阻（歐姆）： | 10k |
| 電路數(shù)： | 2 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 ±300 ppm/°C |
| 存儲(chǔ)器類型： | 非易失 |
| 接口： | 6 線 SPI（芯片選擇，設(shè)備位址） |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-TSSOP |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 1238 (CN2011-ZH PDF) |
4
FN8198.0
March 11, 2005
Potentiometer/Array Description
The X9430 is comprised of two resistor arrays and two
operational amplifiers. Each array contains 63 discrete
resistive segments that are connected in series. The
physical ends of each array are equivalent to the fixed
terminals of a mechanical potentiometer (RH and RL).
At both ends of each array and between each resistor
segment is a CMOS switch connected to the wiper
(RW) output. Within each individual array only one
switch may be turned on at a time. These switches are
controlled by a volatile wiper counter register (WCR).
The six bits of the WCR are decoded to select, and
enable, one of sixty-four switches.
The WCR may be written directly, or it can be changed
by transferring the contents of one of four associated
data registers into the WCR. These data registers and
the WCR can be read and written by the host system.
Operational Amplifier
The voltage operational amplifiers are CMOS rail-to-
rail output general purpose amplifiers. They are
designed to operate from dual (±) power supplies. The
amplifiers may be configured like any standard ampli-
fier. All pins are externally available to allow connec-
tion with the potentiometers or as stand alone
amplifiers.
Write in Process
The contents of the data registers are saved to nonvol-
atile memory when the CS pin goes from LOW to
HIGH after a complete write sequence is received by
the device. The progress of this internal write opera-
tion can be monitored by a write in process bit (WIP).
The WIP bit is read with a read status command.
INSTRUCTIONS AND PROGRAMMING
Identification (ID) Byte
The first byte sent to the X9430 from the host, follow-
ing a CS going HIGH to LOW, is called the identifica-
tion byte. The most significant four bits of the slave
address are a device type identifier, for the X9430 this
is fixed as 0101[B] (refer to Figure 1).
Detailed Block Diagram
VOUT (0,1)
(DR0 - DR3)0,1
Control and
CS
SCK
SO
SI
A1
A0
VH (0,1)
VL (0,1)
WP
VW (0,1)
VN (0,1)
+
–
WCR0,1
(DR0 - DR3)0,1
VINV (0,1)
VSS
VCC
HOLD
Memory
WCR0
WCR1
(One of 2 Circuits)
X9430
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相關(guān)代理商/技術(shù)參數(shù) |
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| X9430WV24I | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Dual Digitally Controlled Potentiometer (XDCP⑩) with Operational Amplifier |
| X9430WV24I-2.7 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Dual Digitally Controlled Potentiometer (XDCP⑩) with Operational Amplifier |
| X9430WV24M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Interface IC |
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