FN8198.0 March 11, 2005 Figure 7. Increment/Decrement Timing REGISTER OPERATION Both digitally controlled potentiometers share the serial interf" />
參數(shù)資料
型號: X9430WV24-2.7
廠商: Intersil
文件頁數(shù): 19/21頁
文件大?。?/td> 0K
描述: IC DUAL DCP + OPAMP 10K 24TSSOP
標準包裝: 75
系列: XDCP™
接片: 64
電阻(歐姆): 10k
電路數(shù): 2
溫度系數(shù): 標準值 ±300 ppm/°C
存儲器類型: 非易失
接口: 6 線 SPI(芯片選擇,設(shè)備位址)
電源電壓: 2.7 V ~ 5.5 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 24-TSSOP
包裝: 管件
產(chǎn)品目錄頁面: 1238 (CN2011-ZH PDF)
7
FN8198.0
March 11, 2005
Figure 7. Increment/Decrement Timing
REGISTER OPERATION
Both digitally controlled potentiometers share the serial
interface and share a common architecture. Each poten-
tiometer is associated with a wiper counter register
(WCR), and four data registers. Figure 8 illustrates the
control, registers, and system features of the device.
Figure 8. System Block Diagram
Wiper Counter (WCR) and Analog Control
Registers (ACR)
The X9430 contains two wiper counter registers, one
for each XDCP. The wiper counter register is equiva-
lent to a serial-in, parallel-out counter with its outputs
decoded to select one of sixty-four switches along its
resistor array. The contents of the wiper counter register
can be altered in four ways: it may be written directly
by the host via the write WCR instruction (serial load);
it may be written indirectly by transferring the contents
of one of four associated data registers (DR) via the
XFR data register instruction (parallel load); it can be
modified one step at a time by the increment/decre-
ment instruction (WCR only). Finally, it may be loaded
with the contents of its associated data register zero
(R0) upon power-up.
The wiper counter register is a volatile register; that is, its
contents are lost when the X9430 is powered-down.
Although the registers are automatically loaded with the
value in R0 upon power-up, it should be noted this may
be different from the value present at power-down.
Data Registers (DR)
Each potentiometer has four nonvolatile data registers
(DR). These can be read or written directly by the host
and data can be transferred between any of the four data
registers and the WCR. It should be noted all operations
changing data in one of these registers is a nonvolatile
operation and will take a maximum of 10ms.
If the application does not require storage of multiple set-
tings for the potentiometer, these registers can be used
as regular memory locations that could store system
parameters or user preference data.
SCK
SI
VW
INC/DEC CMD Issued
tWRID
VOUT
VOUT (0,1)
(DR0-DR3)0,1
Control and
CS
SCK
SO
SI
A1
A0
VH (0,1)
VL (0,1)
WP
VW (0,1)
VN (0,1)
+
WCR0,1
VINV (0,1)
VSS
VCC
HOLD
Memory
WCR0
WCR1
Detailed Block Diagram
X9430
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