參數(shù)資料
型號(hào)： x9440
元件分類(lèi)： 數(shù)字電位計(jì)
英文描述： Dual Digitally-Controlled (EEPOT) Potentiometer & Voltage Comparator(雙數(shù)控電位器和電壓比較器)
中文描述： 雙數(shù)字控制（EEPOT）電位
文件頁(yè)數(shù)： 3/22頁(yè)
文件大?。?/td> 146K
代理商： X9440
X9440
Characteristics subject to change without notice.
3 of 22
REV 1.0 2/27/01
www.xicor.com
PIN CONFIGURATION
PIN NAMES
PRINCIPLES OF OPERATION
The X9440 is a highly integrated microcircuit incorpo-
rating two resistor arrays, two voltage comparators and
their associated registers and counters; and the serial
interface logic providing direct communication between
the host and the digitally-controlled potentiometers and
voltage comparators.
Serial Interface
The X9440 supports the SPI interface hardware con-
ventions. The device is accessed via the SI input with
data clocked in on the rising SCK. CS must be LOW
and the HOLD and WP pins must be HIGH during the
entire operation.
The SO and SI pins can be connected together, since
they have three state outputs. This can help to reduce
system pin count.
Array Description
The X9440 is comprised of two resistor arrays and two
voltage comparators. Each array contains 63 discrete
resistive segments that are connected in series. The
physical ends of each array are equivalent to the fixed
terminals of a mechanical potentiometer (V
inputs).
H
and V
L
At both ends of each array and between each resistor
segment is a CMOS switch connected to the wiper
(V
W
) output. Within each individual array only one
switch may be turned on at a time. These switches are
controlled by a volatile wiper counter register (WCR).
The six bits of the WCR are decoded to select, and
enable, one of sixty-four switches.
The WCR may be written directly, or it can be changed
by transferring the contents of one of four associated
data registers into the WCR. These data registers and
the WCR can be read and written by the host system.
Voltage Comparator
The comparator compares the wiper voltage V
the external input voltage V
logic level output are controlled by the shutdown, latch,
and enable bits of the analog control register (ACR).
Enable connects the comparator output to the V
pin, Latch memorizes the output logic state, and shut-
down removes the analog section supply voltages to
save power. The analog control register (ACR) is pro-
grammed using the SPI serial interface.
W
with
NI
. The comparator and its
OUT
Symbol
SCK
S1, SO
A0-A1
V
H0
–V
V
L0
–V
V
W0
–V
V
NI0
, V
Description
Serial Clock
Serial Data
Device Address
Potentiometers (terminal equivalent)
H1
L1
,
W1
Potentiometers (wiper equivalent)
Comparator Input Voltages
Buffered Comparator Outputs
Hardware Write Protection
Analog and Voltage Comparator
Supplies
System Supply Voltage
System Ground
No Connection
NI1
V
OUT0,
V
OUT1
WP
V+,V-
V
V
NC
CC
SS
V
CC
V
L0
V
H0
V
W0
CS
WP
SI
A1
V
L1
V
H1
V
W1
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V+
V
OUT0
V
NI0
NC
A0
SO
HOLD
SCK
NC
V
NI1
V
OUT1
V-
SOIC
X9440
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
TSSOP
X9440
SI
A1
V
L1
V
H1
V
W1
V
SS
NC
V-
V+
V
OUT0
V
NI0
A0
V
OUT1
V
NI1
SCK
HOLD
S0
V
CC
NC
V
L0
V
H0
V
W0
WP
CS
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