參數資料
型號: X9448WV24-2.7
廠商: Intersil Corporation
英文描述: Mixed Signal with 2-Wire Interface
中文描述: 混合信號的2線接口
文件頁數: 6/20頁
文件大?。?/td> 127K
代理商: X9448WV24-2.7
X9448
Characteristics subject to change without notice.
6 of 20
REV 1.0 6/21/00
www.xicor.com
Figure 5. Increment/Decrement Command Sequence
INSTRUCTION SET
Read Wiper Counter Register (WCR) or Analog Control Register (ACR)
Read the contents of the Wiper Counter Register or Analog Control Register pointed to by P
1
-P
0
.
P1 P0: 00-WCR0, 01 - WCR1
P1 P0: 10-ACR0, 11 - ACR1
Write Wiper Counter Register (WCR) or Analog Control Register (ACR)
Write new value to the Wiper Counter Register or Analog Control Register pointed to by P
1
-P
0
.
P1 P0: 00-WCR0, 01 - WCR1
P1 P0: 10-ACR0, 11 - ACR1
Read Data Register (DR)
Read the contents of the Register pointed to by P
1
-P
0
and R
1
-R
0
.
R1 R0: 00-R0, 10-R1
01-R2, 11-R3
Definitions:
SACK – Slave acknowledge, MACK – Master acknowledge, I/O – Increment/Decrement (I/O), R – Register,
P – Potentiometer
S
T
A
R
T
device type
identifier
device
addresses
S
A
C
K
instruction
opcode
WCR/ACR
addresses
S
A
C
K
register data
(sent by slave on SDA)
M
A
C
K
S
T
O
P
0
1
0
1
A
3
A
2
A
1
A
0
1
0
0
1
0
0
P
1
P
0
0
0
D
5
D
4
D
3
D
2
D
1
D
0
S
T
A
R
T
device type
identifier
device
addresses
S
A
C
K
instruction
opcode
WCR/ACR
addresses
S
A
C
K
register data
(sent by master on SDA)
S
A
C
K
S
T
O
P
0
1
0
1
A
3
A
2
A
1
A
0
1
0
1
0
0
0
P
1
P
0
0
0
D
5
D
4
D
3
D
2
D
1
D
0
S
T
A
R
T
device type
identifier
device
addresses
S
A
C
K
instruction
opcode
WCR/ACR/DR
addresses
S
A
C
K
register data
(sent by master on SDA)
M
A
C
K
S
T
O
P
0 1 0 1
A
3
A
2
A
1
A
0
1 0 1 1
R
1
R
0
P
1
P
0
0 0
D
5
D
4
D
3
D
2
D
1
D
0
S
T
A
R
T
0
1
0
1
A3
A2
A1
A0
A
C
K
I3
I2
I1
I0
P1
P0
R1 R0
A
C
K
SCL
SDA
S
T
O
P
X
X
I
N
C
1
I
N
C
2
I
N
C
n
D
E
C
1
D
E
C
n
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