參數(shù)資料
型號: X9448WV24I-2.7
廠商: Intersil Corporation
英文描述: Mixed Signal with 2-Wire Interface
中文描述: 混合信號的2線接口
文件頁數(shù): 12/20頁
文件大小: 127K
代理商: X9448WV24I-2.7
X9448
Characteristics subject to change without notice.
12 of 20
REV 1.0 6/21/00
www.xicor.com
CAPACITANCE
Power-Up Timing and Sequence
Symbol
C
I/O
C
IN
C
L
, C
H
, C
W
Test
Typical
8
6
10/10/25
Unit
pF
pF
pF
Test Conditions
V
I/O
= 0V
V
IN
= 0V
Input/output capacitance (SDA)
Input capacitance (A0, A1, A2, A3, and SCL)
Potentiometer capacitance
Power up sequence
(1)
: (1) V
CC
(2) V+ and V– {V+
V
CC
at all times}
Power down sequence: no limitation
A.C. TEST CONDITIONS
Note:
(1) Applicable to recall and power consumption applications
EQUIVALENT A.C. LOAD CIRCUIT
I
nput pulse levels
Input rise and fall times
Input and output timing level
V
CC
x 0.1 to V
CC
x 0.9
10ns
V
CC
x 0.5
5V
1533
100pF
SD Output
2.7V
100pF
TIMING DIAGRAMS
START and STOP Timing
g
Input Timing
t
SU:STA
t
HD:STA
t
SU:STO
SCL
SDA
t
R
(START)
(STOP)
t
F
t
R
t
F
SCL
SDA
t
HIGH
t
LOW
t
CYC
t
HD:DAT
t
SU:DAT
t
BUF
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