參數(shù)資料
型號: X9448WV24I-2.7
廠商: Intersil Corporation
英文描述: Mixed Signal with 2-Wire Interface
中文描述: 混合信號的2線接口
文件頁數(shù): 14/20頁
文件大?。?/td> 127K
代理商: X9448WV24I-2.7
X9448
Characteristics subject to change without notice.
14 of 20
REV 1.0 6/21/00
www.xicor.com
AC Timing
High-Voltage Write Cycle Timing
XDCP Timing
Note:
(4) V
CC
= 5V/2.7V
Symbol
f
SCL
t
CYC
t
HIGH
t
LOW
t
SU:STA
t
HD:STA
t
SU:STO
t
SU:DAT
t
HD:DAT
(4)
t
R
t
F
t
AA
t
DH
T
I
t
BUF
t
SU:WPA
t
HD:WPA
Parameter
Min.
Max.
400
Unit
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Clock frequency
Clock cycle time
Clock high time
Clock low time
Start setup time
Start hold time
Stop setup time
SDA data input setup time
SDA data input hold time
SCL and SDA rise time
SCL and SDA fall time
SCL low to SDA data output valid time
SDA Data output hold time
Noise suppression time constant at SCL and SDA inputs
Bus free time (prior to any transmission)
WP, A0, A1, A2 and A3 setup time
WP, A0, A1, A2 and A3 hold time
2500
600
1300
600
600
600
100
0/30
300
300
900
100
50
50
1300
0
0
Symbol
t
WR
Parameter
Typ.
5
Max.
10
Unit
ms
High-voltage write cycle time (store instructions)
Symbol
t
WRL
Parameter
Min.
Max.
10
Unit
μs
Wiper response time after instruction issued (all load instructions)
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