參數(shù)資料
型號(hào)： X9530
廠商： Intersil Corporation
英文描述： Temperature Compensated Laser Diode Controller(帶溫度補(bǔ)償?shù)募す舛O管控制器)
中文描述： 溫度補(bǔ)償激光二極管控制器（帶溫度補(bǔ)償?shù)募す舛O管控制器）
文件頁數(shù)： 26/28頁
文件大小： 372K
代理商： X9530
26
FN8211.1
November 11, 2005
2-WIRE INTERFACE A.C. CHARACTERISTICS
2-WIRE INTERFACE TEST CONDITIONS
NONVOLATILE WRITE CYCLE TIMING
Notes: 1.
Cb = total capacitance of one bus line (SDA or SCL) in pF.
t
WC
is the time from a valid STOP condition at the end of a write sequence to the end of the self-timed internal nonvolatile write cycle. It
is the minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used.
The minimum frequency requirement applies between a START and a STOP condition.
These parameters are periodically sampled and not 100% tested.
2.
3.
4.
Symbol
f
SCL
t
IN(4)
Parameter
Min
1
(3)
Typ
Max
400
50
Units
kHz
ns
Test Conditions / Notes
See “2-Wire Interface Test
Conditions” (below),
SCL Clock Frequency
Pulse width Suppression Time at
inputs
SCL Low to SDA Data Out Valid
Time the bus free before start of new
transmission
Clock Low Time
Clock High Time
Start Condition Setup Time
Start Condition Hold Time
Data In Setup Time
Data In Hold Time
Stop Condition Setup Time
Data Output Hold Time
SDA and SCL Rise Time
See Figure 22, Figure 23
and Figure 24.
t
AA(4)
t
BUF(4)
900
ns
ns
1300
t
LOW
t
HIGH
t
SU:STA
t
HD:STA
t
SU:DAT
t
HD:DAT
t
SU:STO
t
DH
t
R(4)
1.3
0.6
600
600
100
0
600
50
20
1200
(3)
1200
(3)
μ
s
μ
s
ns
ns
ns
μ
s
ns
ns
ns
+0.1Cb
(1)
20
+0.1Cb
(1)
600
600
300
t
F(4)
SDA and SCL Fall Time
300
ns
t
SU:WP
(4)
t
HD:WP
(4)
Cb
(4)
WP Setup Time
WP Hold Time
Capacitive load for each bus line
ns
ns
pF
400
Input Pulse Levels
Input Rise and Fall Times, between 10% and 90%
Input and Output Timing Threshold Level
External Load at pin SDA
10 % to 90 % of Vcc
10 ns
1.4V
2.3 k
Ω
to Vcc and 100 pF to Vss
Symbol
t
WC(2)
Parameter
Min
Typ
5
Max
10
Units
ms
Test Conditions / Notes
See Figure 24
Nonvolatile Write Cycle Time
X9530
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