- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376449 > X98024 (Intersil Corporation) 240MHz Triple Video Digitizer with Digital PLL PDF資料下載
參數(shù)資料
| 型號(hào)： | X98024 |
| 廠商： | Intersil Corporation |
| 英文描述： | 240MHz Triple Video Digitizer with Digital PLL |
| 中文描述： | 240MHz的三路視頻數(shù)字化與數(shù)字鎖相環(huán) |
| 文件頁(yè)數(shù)： | 5/29頁(yè) |
| 文件大小： | 295K |
| 代理商： | X98024 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)當(dāng)前第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)
5
FN8220.0
June 6, 2005
t
SETUP
DATA valid before rising edge of DATACLK 15pF DATACLK load, 15pF DATA load
(Note 1)
1.3
ns
t
HOLD
DATA valid after rising edge of DATACLK
15pF DATACLK load, 15pF DATA load
(Note 1)
2.0
ns
AC TIMING CHARACTERISTICS (2 WIRE INTERFACE)
f
SCL
SCL Clock Frequency
0
400
kHz
Maximum width of a glitch on SCL that will
be suppressed
2 XTAL periods min
80
ns
t
AA
SCL LOW to SDA Data Out Valid
5 XTAL periods plus SDA’s RC time
constant
See
comment
μs
t
BUF
Time the bus must be free before a new
transmission can start
1.3
μs
t
LOW
Clock LOW Time
1.3
μs
t
HIGH
Clock HIGH Time
0.6
μs
t
SU:STA
Start Condition Setup Time
0.6
μs
t
HD:STA
Start Condition Hold Time
0.6
μs
t
SU:DAT
Data In Setup Time
100
ns
t
HD:DAT
Data In Hold Time
0
ns
t
SU:STO
Stop Condition Setup Time
0.6
μs
t
DH
Data Output Hold Time
4 XTAL periods min
160
ns
NOTES:
1. Setup and hold times are at a 140MHz DATACLK rate.
2. For X98024, register 0x2B must be set to 0x15 for crystal frequencies below 24.5MHz
Electrical Specifications
Specifications apply for V
A
= V
D
= V
X
= 3.3V, pixel rate = 240MHz, f
XTAL
= 25MHz, T
A
= 25°C,
unless otherwise noted
(Continued)
SYMBOL
PARAMETER
COMMENT
MIN
TYP
MAX
UNIT
t
SU:STO
t
DH
t
HIGH
t
SU:ST
t
HD:STA
t
HD:DAT
t
SU:DAT
SCL
SDA IN
SDA OUT
t
F
t
LOW
t
BUF
t
AA
t
R
FIGURE 1. 2 WIRE INTERFACE TIMING
DATACLK
t
SETUP
t
HOLD
DATACLK
Pixel Data
FIGURE 2. DATA OUTPUT SETUP AND HOLD TIMING
X98024
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| X98024L128-3.3 | 240MHz Triple Video Digitizer with Digital PLL |
| X98024L128-3.3-Z | 240MHz Triple Video Digitizer with Digital PLL |
| XC145481 | 3 V PCM Codec-Filter |
| XC145481DW | 3 V PCM Codec-Filter |
| XC145481P | 3 V PCM Codec-Filter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X98024_06 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:240MHz Triple Video Digitizer with Digital PLL |
| X98024L128-3.3 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:240MHz Triple Video Digitizer with Digital PLL |
| X98024L128-3.3-Z | 功能描述:IC TRPL VID DIGITIZER 128MQFP RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 標(biāo)準(zhǔn)包裝:250 系列:- 類型:電平移位器 應(yīng)用:LCD 電視機(jī)/監(jiān)控器 安裝類型:表面貼裝 封裝/外殼:28-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:28-WQFN（4x4）裸露焊盤 包裝:帶卷 (TR) 其它名稱:296-32523-2TPS65198RUYT-ND |
| X98027 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:PRELIMINARY INFORMATION |
| X98027_06 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:275MHz Triple Video Digitizer with Digital PLL |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。