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參數(shù)資料
| 型號： | XC17256EVO8I |
| 廠商： | Xilinx Inc |
| 文件頁數(shù)： | 13/13頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SERIAL CFG PROM 256K 8-SOIC |
| 產(chǎn)品變化通告： | XC1700 PROMs,XC5200,HQ,SCD Parts Discontinuation 19/Jul/2010 Product Discontinuation 28/Jul/2010 |
| 標準包裝： | 98 |
| 可編程類型： | OTP |
| 存儲容量： | 256Kb |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-TSOP |
| 包裝： | 管件 |
XC1700E, XC1700EL, and XC1700L Series Configuration PROMs
DS027 (v3.5) June 25, 2008
Product Specification
9
R
AC Characteristics Over Operating Condition
Symbol
Description
XC1701,
XC17128E,
XC17256E
XC17128EL,
XC17256EL,
XC1704L,
XC1702L,
XC1701L,
XC17512L
XC1736E,
XC1765E
XC1765EL
Units
Min
Max
Min
Max
Min
Max
Min
Max
TOE
OE to data delay
–
25
–
30
–
45
–
40
ns
TCE
CE to data delay
–
45
–
45
–
60
–
60
ns
TCAC
CLK to data delay
–
45
–
45
–
80
–
200
ns
TDF
CE or OE to data float delay(2,3)
–50
–
50
–50
–
50
ns
TOH
Data hold from CE, OE, or CLK(3)
0–
0
–
0–0–
ns
TCYC
Clock periods
67
–
67
–
100
–
400
–
ns
TLC
CLK Low time(3)
20
–
25
–
50
–
100
–
ns
THC
CLK High time(3)
20
–
25
–
50
–
100
–
ns
TSCE
CE setup time to CLK
(to guarantee proper counting)
20
–
25
–
25
–
40
–
ns
THCE
CE hold time to CLK
(to guarantee proper counting)
0–
0
–
0–0–
ns
THOE
OE hold time
(guarantees counters are reset)
20
–
25
–
100
–
100
–
ns
Notes:
1.
AC test load = 50 pF.
2.
Float delays are measured with 5 pF AC loads. Transition is measured at ±200 mV from steady state active levels.
3.
Guaranteed by design, not tested.
4.
All AC parameters are measured with VIL = 0.0V and VIH = 3.0V.
RESET/OE
CE
CLK
DATA
TCE
TOE
TLC
TSCE
THCE
THOE
TCAC
TOH
TDF
TOH
THC
DS027_03_021500
TCYC
Product Obsolete or Under Obsolescence
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