參數(shù)資料
型號(hào): XC2S100E-6PQ208C
廠商: Xilinx Inc
文件頁(yè)數(shù): 105/108頁(yè)
文件大?。?/td> 0K
描述: IC FPGA 1.8V 600 CLB'S 208-PQFP
產(chǎn)品變化通告: FPGA Family Discontinuation 18/Apr/2011
標(biāo)準(zhǔn)包裝: 24
系列: Spartan®-IIE
LAB/CLB數(shù): 600
邏輯元件/單元數(shù): 2700
RAM 位總計(jì): 40960
輸入/輸出數(shù): 146
門數(shù): 100000
電源電壓: 1.71 V ~ 1.89 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 208-BFQFP
供應(yīng)商設(shè)備封裝: 208-PQFP(28x28)
其它名稱: 122-1207
96
DS077-4 (v3.0) August 9, 2013
Product Specification
Spartan-IIE FPGA Family: Pinout Tables
R
— OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE —
GCK0, I
4
AF14
-
GCK0, I
I/O (DLL), L126P
4
AE14
-
I/O (DLL), L126P
I/O
4
AD14
-
I/O
I/O, L125N
4
AC14
-
I/O, L125N
I/O, L125P
4
AB14
-
I/O, L125P
I/O
4
AC15
-
I/O
I/O, L124N
4
AA14
XC2S600E
-
I/O, L124N
I/O, L124N_Y
I/O, VREF Bank 4,
L124P
4
Y14
XC2S600E
All
I/O, VREF Bank 4,
L124P
I/O, VREF Bank 4,
L124P_Y
I/O, L123N
4
AF15
XC2S600E
-
I/O, L123N
I/O, L123N_Y
I/O, L123P
4
AE15
XC2S600E
-
I/O, L123P
I/O, L123P_Y
I/O
4
AB15
-
I/O
I/O, L122N_YY
4
AA15
All
-
I/O, L122N_YY
I/O, L122P_YY
4
Y15
All
-
I/O, L122P_YY
I/O
4
AF16
-
I/O
I/O, L121N_YY
4
W15
All
-
I/O, L121N_YY
I/O, VREF Bank 4,
L121P_YY
4
V15
All
I/O, VREF Bank 4,
L121P_YY
I/O, VREF Bank 4,
L121P_YY
I/O, L120N_YY
4
AE16
All
-
I/O, L120N_YY
I/O, L120P_YY
4
AD16
All
-
I/O, L120P_YY
I/O
4
AB16
-
I/O
I/O, L119N
4
AA16
-
I/O, L119N
I/O, L119P
4
Y16
-
I/O, L119P
I/O
4
W16
-
I/O
I/O, L118N_YY
4
AF17
All
-
I/O, L118N_YY
I/O, L118P_YY
4
AE17
All
-
I/O, L118P_YY
I/O, L117N_YY
4
AD17
All
-
I/O, L117N_YY
I/O, L117P_YY
4
AC17
All
-
I/O, L117P_YY
I/O
4
AB17
-
I/O
I/O, L116N
4
Y17
XC2S600E
-
I/O, L116N
I/O, L116N_Y
I/O, L116P
4
W17
XC2S600E
-
I/O, L116P
I/O, L116P_Y
I/O
4
AF18
-
I/O
I/O, L115N_YY
4
AE18
All
-
I/O, L115N_YY
I/O, L115P_YY
4
AD18
All
-
I/O, L115P_YY
FG676 Pinouts (XC2S400E, XC2S600E) (Continued)
Pad Name
Pin
LVDS Async.
Output Option
VREF
Option
Device-Specific Pinouts
Function
Bank
XC2S400E
XC2S600E
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