參數(shù)資料
型號： XC5VLX50T-1FF665C
廠商： Xilinx Inc
文件頁數(shù)： 87/91頁
文件大?。?/td> 0K
描述： IC FPGA VIRTEX-5 50K 665FCBGA
產(chǎn)品變化通告： Step Intro and Pkg Change 11/March/2008
標準包裝： 1
系列： Virtex®-5 LXT
LAB/CLB數(shù)： 3600
邏輯元件/單元數(shù)： 46080
RAM 位總計： 2211840
輸入/輸出數(shù)： 360
電源電壓： 0.95 V ~ 1.05 V
安裝類型： 表面貼裝
工作溫度： 0°C ~ 85°C
封裝/外殼： 665-BBGA，F(xiàn)CBGA
供應(yīng)商設(shè)備封裝： 665-FCBGA
配用： 568-5088-ND - BOARD DEMO DAC1408D750
HW-V5-ML561-UNI-G-ND - EVALUATION PLATFORM VIRTEX-5
HW-V5-ML550-UNI-G-ND - EVALUATION PLATFORM VIRTEX-5
HW-V5-ML521-UNI-G-ND - EVALUATION PLATFORM VIRTEX-5
HW-V5GBE-DK-UNI-G-ND - KIT DEV V5 LXT GIGABIT ETHERNET
122-1508-ND - EVALUATION PLATFORM VIRTEX-5
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
DS202 (v5.3) May 5, 2010
Product Specification
88
05/18/07
3.1
Added typical values for n and r in Table 3.
Revised and added values to Table 4.
Revised standard I/O levels in Table 7.
Changed the design software version that matches this data sheet above Table 54 on page 30.
In Switching Characteristics, the following values are revised:
LVTTL, Slow and Fast, 2 mA, 4 mA, and 6 mA (Table 56).
LVCMOS33, Slow and Fast, 2 mA, 4 mA, and 6 mA (Table 56).
LVCMOS25, Slow and Fast, 2 mA and 4 mA, and Fast 12 mA (Table 56).
LVCMOS18, Slow and Fast, 2 mA, 4 mA, and 6 mA (Table 56).
LVCMOS15 and LVCMOS12, Slow and Fast, 2 mA (Table 56).
TIDOCK and TIDOCKD in Table 60.
Setup/Hold for Control Lines and Data Lines in Table 62.
Add TIDELAYPAT_JIT and revised TIDELAYRESOLUTION in Table 64, page 44 and added Notes 1 and 2.
Revised TRCK page 45 and removed TCKSR Table 65, page 44.
Replaced TTWC with TMCP symbol in Table 66, page 46.
Revised TCECK in Table 67.
Revised TRCKO_FLAGS and TRDCK_DI_ECC encode only in Table 68.
Revised Hold Times of Data/Control Pins to the Input Register Clock.
Setup/Hold times of {PCIN, CARRYCASCIN, MULTSIGNIN} input to P register CLK. Hold times of
some of the CE pins. Hold times of some of the RST pins. Hold times of {A, B} input to {P,
CARRYOUT} output using multiplier and {ACIN, BCIN} input to {P, CARRYOUT} output using
multiplier, CLK (AREG, BREG) to {P, CARRYOUT} output using multiplier, in Table 69.
Updated and added values to Table 70, page 51.
Revised -1 speed FMAX value in Table 72, page 53.
Added Note 4 to TLOCKMAX and revised FINDUTY, FINMAX,and FVCOMAX in Table 74, page 55.
Added ± values to Table 79 and Table 80. Changed TOUT_OFFSET in Table 80.
Revised values in Table 84 through Table 90.
Revised values in Table 91 through Table 97.
Revised values in Table98, page83.
Added package skew values to Table 99, page 84.
Revised values in Table 101, page 85.
06/15/07
3.2
Updated TSTG in Table 1.
Corrected VOH/VOL in Table 9 and Table10, page8.
Changed the design software version that matches this data sheet above Table 54 on page 30.
Added TIODELAY_CLK_MAX and revised TCKSR in Table 64, page 44.
Corrected units to ns in Table 98, page 83.
Date
Version
Revision
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XC5VLX50T-1FF665CES 制造商:Xilinx 功能描述:
XC5VLX50T-1FF665I 功能描述:IC FPGA VIRTEX-5 50K 665FCBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Virtex®-5 LXT 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標準包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計:4866048 輸入/輸出數(shù):480 門數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5
XC5VLX50T-1FFG1136C 功能描述:IC FPGA VIRTEX-5 50K 1136FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Virtex®-5 LXT 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標準包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計:4866048 輸入/輸出數(shù):480 門數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5
XC5VLX50T-1FFG1136C4113 制造商:Xilinx 功能描述:
XC5VLX50T-1FFG1136CES 功能描述:IC FPGA VIRTEX-5 ES 50K 1136FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Virtex®-5 LXT 標準包裝:1 系列:Kintex-7 LAB/CLB數(shù):25475 邏輯元件/單元數(shù):326080 RAM 位總計:16404480 輸入/輸出數(shù):350 門數(shù):- 電源電壓:0.97 V ~ 1.03 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:900-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:900-FCBGA（31x31） 其它名稱:122-1789
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