參數(shù)資料
型號: XC5VLX85-2FF676C
廠商: Xilinx Inc
文件頁數(shù): 57/91頁
文件大小: 0K
描述: IC FPGA VIRTEX-5 85K 676FBGA
標(biāo)準(zhǔn)包裝: 1
系列: Virtex®-5 LX
LAB/CLB數(shù): 6480
邏輯元件/單元數(shù): 82944
RAM 位總計(jì): 3538944
輸入/輸出數(shù): 440
電源電壓: 0.95 V ~ 1.05 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 676-BBGA,F(xiàn)CBGA
供應(yīng)商設(shè)備封裝: 676-FCBGA(27x27)
配用: 568-5088-ND - BOARD DEMO DAC1408D750
HW-AFX-FF676-500-G-ND - BOARD DEV VIRTEX 5 FF676
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
DS202 (v5.3) May 5, 2010
Product Specification
60
Output Clock Jitter
Output Clock Phase Alignment
Table 79: Output Clock Jitter
Symbol
Description
Constraints
Speed Grade
Units
-3
-2
-1
Clock Synthesis Period Jitter
TPERJITT_0
CLK0
±120
ps
TPERJITT_90
CLK90
±120
ps
TPERJITT_180
CLK180
±120
ps
TPERJITT_270
CLK270
±120
ps
TPERJITT_2X
CLK2X, CLK2X180
±200
±230
ps
TPERJITT_DV1
CLKDV (integer division)
±150
±180
ps
TPERJITT_DV2
CLKDV (non-integer division)
±300
±345
ps
TPERJITT_FX
CLKFX, CLKFX180
Note 1
ps
Notes:
1.
Values for this parameter are available in the Architecture Wizard.
Table 80: Output Clock Phase Alignment
Symbol
Description
Constraints
Speed Grade
Units
-3
-2
-1
Phase Offset Between CLKIN and CLKFB
TIN_FB_OFFSET
CLKIN/CLKFB
±50
±60
ps
Phase Offset Between Any DCM Outputs(1)
TOUT_OFFSET_1X
CLK0, CLK90, CLK180, CLK270
±140
±160
ps
TOUT_OFFSET_2X
CLK2X, CLK2X180, CLKDV
±150
±200
ps
TOUT_OFFSET_FX
CLKFX, CLKFX180
±160
±220
ps
Duty Cycle Precision(2)
TDUTY_CYC_DLL
DLL outputs(3)
±150
±180
ps
TDUTY_CYC_FX
DFS outputs(4)
±150
±180
ps
Notes:
1.
All phase offsets are in respect to group CLK1X.
2.
CLKOUT_DUTY_CYCLE_DLL applies to the 1X clock outputs (CLK0, CLK90, CLK180, and CLK270) only if
DUTY_CYCLE_CORRECTION = TRUE. The duty cycle distortion includes the global clock tree (BUFG).
3.
DLL Outputs are used in these instances to describe the outputs: CLK0, CLK90, CLK180, CLK270, CLK2X, CLK2X180, and CLKDV.
4.
DFS Outputs are used in these instances to describe the outputs: CLKFX and CLKFX180.
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XC5VLX85-2FF676CES 制造商:Xilinx 功能描述:
XC5VLX85-2FF676I 功能描述:IC FPGA VIRTEX-5 85K 676FBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:Virtex®-5 LX 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標(biāo)準(zhǔn)包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計(jì):4866048 輸入/輸出數(shù):480 門數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA,F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5
XC5VLX85-2FFG1153C 功能描述:IC FPGA VIRTEX-5 85K 1153FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:Virtex®-5 LX 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標(biāo)準(zhǔn)包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計(jì):4866048 輸入/輸出數(shù):480 門數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA,F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5
XC5VLX85-2FFG1153I 功能描述:IC FPGA VIRTEX-5 85K 1153FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:Virtex®-5 LX 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計(jì):3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA(34.55x34.55)
XC5VLX85-2FFG676C 功能描述:IC FPGA VIRTEX-5 85K 676FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:Virtex®-5 LX 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標(biāo)準(zhǔn)包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計(jì):4866048 輸入/輸出數(shù):480 門數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA,F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5