參數(shù)資料
型號: XC6VCX240T-2FFG1156I
廠商: Xilinx Inc
文件頁數(shù): 21/52頁
文件大?。?/td> 0K
描述: IC FPGA VIRTEX 6 241K 1156FFGBGA
產(chǎn)品培訓模塊: Virtex-6 FPGA Overview
產(chǎn)品變化通告: Virtex-6 FIFO Input Logic Reset 18/Apr/2011
標準包裝: 1
系列: Virtex® 6 CXT
LAB/CLB數(shù): 18840
邏輯元件/單元數(shù): 241152
RAM 位總計: 15335424
輸入/輸出數(shù): 600
電源電壓: 0.95 V ~ 1.05 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 1156-BBGA,F(xiàn)CBGA
供應商設備封裝: 1156-FCBGA(35x35)
Virtex-6 CXT Family Data Sheet
DS153 (v1.6) February 11, 2011
Product Specification
28
LVPECL_25
1.09
1.65
ns
HSTL_I_12
1.06
1.78
ns
HSTL_I_DCI
1.06
1.66
ns
HSTL_II_DCI
1.06
1.68
ns
HSTL_II_T_DCI
1.06
1.66
ns
HSTL_III_DCI
1.06
1.62
ns
HSTL_I_DCI_18
1.06
1.68
ns
HSTL_II_DCI_18
1.06
1.62
ns
HSTL_II _T_DCI_18
1.06
1.68
ns
HSTL_III_DCI_18
1.06
1.061.691.691.691.69
ns
DIFF_HSTL_I_18
1.09
1.75
ns
DIFF_HSTL_I_DCI_18
1.09
1.68
ns
DIFF_HSTL_I
1.09
1.73
ns
DIFF_HSTL_I_DCI
1.09
1.66
ns
DIFF_HSTL_II_18
1.09
1.81
ns
DIFF_HSTL_II_DCI_18
1.09
1.62
ns
DIFF_HSTL_II _T_DCI_18
1.091.091.681.681.681.68
ns
DIFF_HSTL_II
1.09
1.74
ns
DIFF_HSTL_II_DCI
1.09
1.68
ns
SSTL2_I_DCI
1.06
1.70
ns
SSTL2_II_DCI
1.06
1.67
ns
SSTL2_II_T_DCI
1.06
1.70
ns
SSTL18_I
1.06
1.75
ns
SSTL18_II
1.06
1.67
ns
SSTL18_I_DCI
1.06
1.67
ns
SSTL18_II_DCI
1.06
1.63
ns
SSTL18_II_T_DCI
1.06
1.67
ns
SSTL15_T_DCI
1.06
1.68
ns
SSTL15_DCI
1.06
1.68
ns
DIFF_SSTL2_I
1.09
1.77
ns
DIFF_SSTL2_I_DCI
1.09
1.70
ns
DIFF_SSTL2_II
1.09
1.72
ns
DIFF_SSTL2_II_DCI
1.09
1.67
ns
DIFF_SSTL2_II_T_DCI
1.09
1.70
ns
DIFF_SSTL18_I
1.09
1.75
ns
DIFF_SSTL18_I_DCI
1.09
1.67
ns
DIFF_SSTL18_II
1.09
1.67
ns
DIFF_SSTL18_II_DCI
1.09
1.63
ns
Table 38: IOB Switching Characteristics (Cont’d)
I/O Standard
TIOPI
TIOOP
TIOTP
Units
Speed Grade
-2
-1
-2
-1
-2
-1
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