參數(shù)資料
型號: XC6VCX240T-2FFG784C
廠商: Xilinx Inc
文件頁數(shù): 12/52頁
文件大小: 0K
描述: IC FPGA VIRTEX 6 241K 784FFGBGA
產(chǎn)品培訓模塊: Virtex-6 FPGA Overview
產(chǎn)品變化通告: Virtex-6 FIFO Input Logic Reset 18/Apr/2011
標準包裝: 1
系列: Virtex® 6 CXT
LAB/CLB數(shù): 18840
邏輯元件/單元數(shù): 241152
RAM 位總計: 15335424
輸入/輸出數(shù): 400
電源電壓: 0.95 V ~ 1.05 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 784-BBGA,F(xiàn)CBGA
供應商設(shè)備封裝: 784-FCBGA
Virtex-6 CXT Family Data Sheet
DS153 (v1.6) February 11, 2011
Product Specification
2
Virtex-6 CXT FPGA Feature Summary
Virtex-6 CXT FPGA Device-Package Combinations and Maximum I/Os
Virtex-6 CXT FPGA package combinations with the maximum available I/Os per package are shown in Table 2.
Virtex-6 CXT FPGA Ordering Information
The Virtex-6 CXT FPGA ordering information shown in Figure 1 applies to all packages including Pb-Free.
Table 1: Virtex-6 CXT FPGA Feature Summary by Device
Device
Logic
Cells
Configurable Logic
Blocks (CLBs)
DSP48E1
Slices(2)
Block RAM Blocks
MMCMs(4)
Interface
Blocks for
PCI Express
Ethernet
MACs(5)
Maximum
GTX
Transceivers
Total
I/O
Banks(6)
Max
User
I/O(7)
Slices(1)
Max
Distributed
RAM (Kb)
18 Kb(3)
36 Kb
Max (Kb)
XC6VCX75T
74,496
11,640
1,045
288
312
156
5,616
6
1
12
9
360
XC6VCX130T
128,000
20,000
1,740
480
528
264
9,504
10
2
1
16
15
600
XC6VCX195T
199,680
31,200
3,040
640
688
344
12,384
10
2
1
16
15
600
XC6VCX240T
241,152
37,680
3,650
768
832
416
14,976
12
2
1
16
18
600
Notes:
1.
Each Virtex-6 CXT FPGA slice contains four LUTs and eight flip-flops, only some slices can use their LUTs as distributed RAM or SRLs.
2.
Each DSP48E1 slice contains a 25 x 18 multiplier, an adder, and an accumulator.
3.
Block RAMs are fundamentally 36 Kbits in size. Each block can also be used as two independent 18 Kb blocks.
4.
Each CMT contains two mixed-mode clock managers (MMCM).
5.
This table lists individual Ethernet MACs per device.
6.
Does not include configuration Bank 0.
7.
This number does not include GTX transceivers.
Table 2: Virtex-6 CXT FPGA Device-Package Combinations and Maximum Available I/Os
Package
FF484
FFG484
FF784
FFG784
FF1156
FFG1156
Size (mm)
23x23
29x29
35x35
Device
GTs
I/O
GTs
I/O
GTs
I/O
XC6VCX75T
8 GTXs
240
12 GTXs
360
XC6VCX130T
8 GTXs
240
12 GTXs
400
16 GTXs
600
XC6VCX195T
12 GTXs
400
16 GTXs
600
XC6VCX240T
12 GTXs
400
16 GTXs
600
Notes:
1.
Flip-chip packages are also available in Pb-Free versions (FFG).
X-Ref Target - Figure 1
Figure 1: Virtex-6 CXT FPGA Ordering Information
Example: XC6VCX240T-1FFG1156C
Device Type
Temperature Range:
C = Commercial (TJ = 0°C to +85°C)
I = Industrial (TJ = –40°C to +100°C)
Number of Pins
Package Type
Speed Grade
(-1, -2)
Pb-Free
DS153_01_062109
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