- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄4142 > XCS40XL-4PQ208C (Xilinx Inc)IC FPGA 3.3V C-TEMP 208-PQFP PDF資料下載
參數(shù)資料
| 型號： | XCS40XL-4PQ208C |
| 廠商： | Xilinx Inc |
| 文件頁數(shù)： | 23/83頁 |
| 文件大小： | 0K |
| 描述： | IC FPGA 3.3V C-TEMP 208-PQFP |
| 產(chǎn)品變化通告： | Product Discontinuation 26/Oct/2011 |
| 標準包裝： | 24 |
| 系列： | Spartan®-XL |
| LAB/CLB數(shù)： | 784 |
| 邏輯元件/單元數(shù)： | 1862 |
| RAM 位總計： | 25088 |
| 輸入/輸出數(shù)： | 169 |
| 門數(shù)： | 40000 |
| 電源電壓： | 3 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | 0°C ~ 85°C |
| 封裝/外殼： | 208-BFQFP |
| 供應商設備封裝： | 208-PQFP（28x28） |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁當前第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁
Spartan and Spartan-XL FPGA Families Data Sheet
DS060 (v2.0) March 1, 2013
3
Product Specification
R
Product Obsolete/Under Obsolescence
Spartan and Spartan-XL devices provide system clock
rates exceeding 80 MHz and internal performance in
excess of 150 MHz. In addition to the conventional benefit
of high volume programmable logic solutions, Spartan
series FPGAs also offer on-chip edge-triggered single-port
and dual-port RAM, clock enables on all flip-flops, fast carry
logic, and many other features.
The Spartan/XL families leverage the highly successful
XC4000 architecture with many of that family’s features and
benefits. Technology advancements have been derived
from the XC4000XLA process developments.
Logic Functional Description
The Spartan series uses a standard FPGA structure as
shown in Figure 1, page 2. The FPGA consists of an array
of configurable logic blocks (CLBs) placed in a matrix of
routing channels. The input and output of signals is
achieved through a set of input/output blocks (IOBs) forming
a ring around the CLBs and routing channels.
CLBs provide the functional elements for implementing
the user’s logic.
IOBs provide the interface between the package pins
and internal signal lines.
Routing channels provide paths to interconnect the
inputs and outputs of the CLBs and IOBs.
The functionality of each circuit block is customized during
configuration by programming internal static memory cells.
The values stored in these memory cells determine the
logic functions and interconnections implemented in the
FPGA.
Configurable Logic Blocks (CLBs)
The CLBs are used to implement most of the logic in an
FPGA. The principal CLB elements are shown in the simpli-
fied block diagram in Figure 2. There are three look-up
tables (LUT) which are used as logic function generators,
two flip-flops and two groups of signal steering multiplexers.
There are also some more advanced features provided by
the CLB which will be covered in the Advanced Features
Function Generators
Two 16 x 1 memory look-up tables (F-LUT and G-LUT) are
used to implement 4-input function generators, each offer-
ing unrestricted logic implementation of any Boolean func-
tion of up to four independent input signals (F1 to F4 or G1
to G4). Using memory look-up tables the propagation delay
is independent of the function implemented.
A third 3-input function generator (H-LUT) can implement
any Boolean function of its three inputs. Two of these inputs
are controlled by programmable multiplexers (see box "A" of
Figure 2). These inputs can come from the F-LUT or G-LUT
outputs or from CLB inputs. The third input always comes
from a CLB input. The CLB can, therefore, implement cer-
tain functions of up to nine inputs, like parity checking. The
three LUTs in the CLB can also be combined to do any arbi-
trarily defined Boolean function of five inputs.
相關PDF資料 |
PDF描述 |
|---|---|
| AMC49DRTS | CONN EDGECARD 98POS .100 DIP SLD |
| XCS40XL-4CS280C | IC FPGA 3.3V C-TEMP 280-CSBGA |
| XCS40XL-4BG256I | IC FPGA 3.3V I-TEMP 256-PBGA |
| AMC49DRES | CONN EDGECARD 98POS .100 EYELET |
| XCS40XL-4BG256C | IC FPGA 3.3V C-TEMP 256-PBGA |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| XCS40XL-4PQ208I | 功能描述:IC FPGA 3.3V I-TEMP 208-PQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Spartan®-XL 標準包裝:1 系列:Kintex-7 LAB/CLB數(shù):25475 邏輯元件/單元數(shù):326080 RAM 位總計:16404480 輸入/輸出數(shù):350 門數(shù):- 電源電壓:0.97 V ~ 1.03 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:900-BBGA，F(xiàn)CBGA 供應商設備封裝:900-FCBGA（31x31） 其它名稱:122-1789 |
| XCS40XL-4PQ240C | 功能描述:IC 3.3V FPGA COMM. TEMP 240PQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Spartan®-XL 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標準包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計:3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應商設備封裝:120-CPGA（34.55x34.55） |
| XCS40XL-4PQ240I | 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS40XL-4PQ256C | 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS40XL-4PQ256I | 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
發(fā)布緊急采購，3分鐘左右您將得到回復。