參數(shù)資料
型號(hào): XCV405E-7BG560I
廠商: Xilinx Inc
文件頁數(shù): 42/118頁
文件大?。?/td> 0K
描述: IC FPGA 1.8V 560-MBGA
產(chǎn)品變化通告: FPGA Family Discontinuation 18/Apr/2011
標(biāo)準(zhǔn)包裝: 1
系列: Virtex®-E EM
LAB/CLB數(shù): 2400
邏輯元件/單元數(shù): 10800
RAM 位總計(jì): 573440
輸入/輸出數(shù): 404
門數(shù): 129600
電源電壓: 1.71 V ~ 1.89 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 560-LBGA,金屬
供應(yīng)商設(shè)備封裝: 560-MBGA(42.5x42.5)
Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
R
DS025-1 (v3.0) March 21, 2014
Module 1 of 4
Production Product Specification
3
— OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE —
Virtex-E Extended Memory Device/Package Combinations and Maximum I/O
Virtex-E Extended Memory Ordering Information
Table 2: Performance for Common Circuit Functions
Function
Bits
Virtex-E -7
Register-to-Register
Adder
16
64
4.3 ns
6.3 ns
Pipelined Multiplier
8 x 8
16 x 16
4.4 ns
5.1 ns
Address Decoder
16
64
3.8 ns
5.5 ns
16:1 Multiplexer
4.6 ns
Parity Tree
9
18
36
3.5 ns
4.3 ns
5.9 ns
Chip-to-Chip
HSTL Class IV
LVTTL,16mA, fast slew
LVDS
LVPECL
Table 3: Virtex-EM Family Maximum User I/O by Device/Package (Excluding Dedicated Clock Pins)
Package
XCV405E
XCV812E
BG560
404
FG676
404
FG900
556
Figure 1: Virtex Ordering Information
Example: XCV405E-6BG560C
Device Type
Temperature Range
C = Commercial (TJ = 0C to +85C)
I = Industrial (TJ = 40C to +100C)
Number of Pins
Package Type
BG = Ball Grid Array
FG = Fine Pitch Ball Grid Array
Speed Grade
(-6, -7, -8)
DS025_001_112000
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