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參數(shù)資料
| 型號： | XR16C854DCV |
| 廠商： | EXAR CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | QUAD UART WITH RX/TX FIFO COUNTERS,128-BYTE FIFO |
| 中文描述： | 4 CHANNEL(S), 2M bps, SERIAL COMM CONTROLLER, PQFP64 |
| 封裝： | 10 X 10 MM, 1.40 MM HEIGHT, TQFP-64 |
| 文件頁數(shù)： | 20/51頁 |
| 文件大?。?/td> | 476K |
| 代理商： | XR16C854DCV |
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XR16C854
20
Rev. 1.00P
Divide
by
1 logic
XTAL1
XTAL2
Divide
by
4 logic
Clock
Oscillator
Logic
Baudrate
Generator
Logic
-BAUDOUT
MCR
Bit-7=0
MCR
Bit-7=1
Figure 11, Baud Rate Generator Circuitry
DMA Operation
The 854 FIFO trigger level provides additional flexibil-
ity to the user for block mode operation. LSR bits 5-6
provide an indication when the transmitter is empty or
has an empty location(s). The user can optionally
operate the transmit and receive FIFOs in the DMA
mode (FCR bit-3). When the transmit and receive
FIFOs are enabled and the DMA mode is deactivated
(DMA Mode 0), the 854 activates the interrupt output
pin for each data transmit or receive operation. When
DMA mode is activated (DMA Mode 1), the user
takes the advantage of block mode operation by
loading or unloading the FIFO in a block sequence
determined by the preset trigger level. In this mode,
the 854 sets the interrupt output pin when characters
in the transmit FIFOs are below the transmit trigger
level, or the characters in the receive FIFOs are
above the receive trigger level.
Sleep Mode
The 854 is designed to operate with low power con-
sumption. A special sleep mode is included to further
reduce power consumption when the chip is not being
used. With EFR bit-4 and IER bit-4 enabled (set to a
logic 1), the 854 enters the sleep mode but resumes
normal operation when a start bit is detected, a change
of state on any of the modem input pins RX, -RI, -CTS,
-DSR, -CD, or transmit data is provided by the user. If
the sleep mode is enabled and the 854 is awakened by
one of the conditions described above, it will return to
the sleep mode automatically after the last character
is transmitted or read by the user. In any case, the
sleep mode will not be entered while an interrupt(s) is
pending. The 854 will stay in the sleep mode of
operation until it is disabled by setting IER bit-4 to a
logic 0.
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PDF描述 |
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| XR16C854DIV | QUAD UART WITH RX/TX FIFO COUNTERS,128-BYTE FIFO |
| XR16C854IJ | QUAD UART WITH RX/TX FIFO COUNTERS,128-BYTE FIFO |
| XR16C854IQ | QUAD UART WITH RX/TX FIFO COUNTERS,128-BYTE FIFO |
| XR16C854IV | APH97-3108A20-29S |
| XR16C854D | 2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XR16C854DCV-0A-EB | 功能描述:UART 接口集成電路 Supports C854D 64 ld TQFP, ISA Interface RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR16C854DCV-F | 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR16C854DCVTR-F | 制造商:Exar Corporation 功能描述:UART 4-CH 128Byte FIFO 3.3V/5V 64-Pin LQFP T/R 制造商:Exar Corporation 功能描述:XR16C854DCVTR-F |
| XR16C854DIV | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO |
| XR16C854DIV-F | 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
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