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參數(shù)資料
| 型號： | XR16C854IV |
| 廠商： | EXAR CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | APH97-3108A20-29S |
| 中文描述： | 4 CHANNEL(S), 2M bps, SERIAL COMM CONTROLLER, PQFP64 |
| 封裝： | 10 X 10 MM, 1.40 MM HEIGHT, TQFP-64 |
| 文件頁數(shù)： | 27/51頁 |
| 文件大?。?/td> | 476K |
| 代理商： | XR16C854IV |
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XR16C854
27
Rev. 1.00P
FCR BIT-3:
Logic 0 = Set DMA mode 0. (normal default condi-
tion)
Logic 1 = Set DMA mode 1.
Transmit operation in mode 0:
When the 854 is in the ST16C450 mode (FIFOs
disabled, FCR bit-0 = logic 0) or in the FIFO mode
(FIFOs enabled, FCR bit-0 = logic 1, FCR bit-3 = logic
0) and when there are no characters in the transmit
FIFO or transmit holding register, the -TXRDY pin will
be a logic 0. Once active the -TXRDY pin will go to a
logic 1 after the first character is loaded into the
transmit holding register.
Receive operation in mode 0:
When the 854 is in mode 0 (FCR bit-0 = logic 0) or
in the FIFO mode (FCR bit-0 = logic 1, FCR bit-3 =
logic 0) and there is at least one character in the
receive FIFO, the -RXRDY pin will be a logic 0. Once
active the -RXRDY pin will go to a logic 1 when there
are no more characters in the receiver.
Transmit operation in mode 1:
When the 854 is in FIFO mode ( FCR bit-0 = logic 1,
FCR bit-3 = logic 1 ), the -TXRDY pin will be a logic 1
when the transmit FIFO is completely full. It will be a
logic 0 if one or more FIFO locations are empty.
Receive operation in mode 1:
When the 854 is in FIFO mode (FCR bit-0 = logic 1,
FCR bit-3 = logic 1) and the trigger level has been
reached, or a Receive Time Out has occurred, the -
RXRDY pin will go to a logic 0. Once activated, it will
go to a logic 1 after there are no more characters in the
FIFO.
FCR BIT 4-5: (logic 0 or cleared is the default condi-
tion, TX trigger level = none)
The XR16C854 provide 4 user selectable trigger
levels, The FCTR Bits 4-5 selects one of the following
table. These bits are used to set the trigger level for the
transmit FIFO interrupt. The XR16C854 will issue a
transmit empty interrupt when number of characters in
FIFO drops below the selected trigger level.
TRIGGER TABLE-A (Transmit)
Default setting after reset ST16C550 mode
BIT-5
BIT-4
FIFO trigger level
X
X
None
TRIGGER TABLE-B (Transmit)
BIT-5
BIT-4
FIFO trigger level
0
0
1
1
0
1
0
1
16
8
24
30
TRIGGER TABLE-C (Transmit)
BIT-5
BIT-4
FIFO trigger level
0
0
1
1
0
1
0
1
8
16
32
56
TRIGGER TABLE-D (Transmit)
BIT-5
BIT-4
FIFO trigger level
X
X
User programmable
Trigger levels
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XR16C854D | 2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO |
| XR16C864 | Quad UART with RX/TX FIFO Counters and 128-byte FIFO(四通用異步接收器/發(fā)送器（帶RX/TX 先進(jìn)先出計數(shù)器和128字節(jié)先進(jìn)先出）) |
| XR16C872 | Dual UART with 1284 Parallel Port and Plug-and-Play（PnP） Controller(雙通用異步接收器/發(fā)送器（帶1284雙向并行端口和即插即用控制器）) |
| XR16L2450 | 2.25V TO 5.5V DUART |
| XR16L2450IJ | 97-3108A20-29S-KIT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XR16C854IV-F | 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR16C854IV-F | 制造商:Exar Corporation 功能描述:IC QUAD UART 2MBPS 5.5V 64-LQFP |
| XR16C854IVTR-F | 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR16C864 | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO |
| XR16C864CQ | 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述: |
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