參數(shù)資料
型號: XR16L2450IM-F
廠商: Exar Corporation
文件頁數(shù): 1/30頁
文件大小: 0K
描述: IC UART FIFO 1B DUAL 48TQFP
標準包裝: 250
特點: *
通道數(shù): 2,DUART
FIFO's: 1 字節(jié)
規(guī)程: RS232
電源電壓: 2.25 V ~ 5.5 V
帶故障啟動位檢測功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 48-TQFP
供應(yīng)商設(shè)備封裝: 48-TQFP(7x7)
包裝: 托盤
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com
xr
XR16L2450
2.25V TO 5.5V DUART
MAY 2005
REV. 1.1.1
GENERAL DESCRIPTION
The XR16L2450 (L2450) is a dual universal asyn-
chronous receiver and transmitter (UART). The
XR16L2450
is
an
improved
version
of
the
ST16C2450 with lower operating voltage and 5 volt
tolerant inputs. The L2450 provides enhanced UART
functions, a modem control interface and data rates
up to 1.5 Mbps. Onboard status registers provide the
user with error indications and operational status. In-
dependent programmable baud rate generators are
provided to select transmit and receive clock rates up
to 1.5 Mbps. An internal loopback capability allows
onboard diagnostics. The L2450 is available in a 44-
pin PLCC and 48-pin TQFP packages. The L2450 is
fabricated in an advanced CMOS process capable of
operating from 2.25 volt to 5.5 volt power supply with
5 volt tolerant inputs.
APPLICATIONS
Portable Appliances
Telecommunication Network Routers
Ethernet Network Routers
Cellular Data Devices
Factory Automation and Process Controls
FEATURES
2.25 to 5.5 Volt Operation
5 Volt Tolerant Inputs
Pin-to-pin compatible to Exar’s ST16C2450,
ST16C2550,
XR16L2550,
XR16L2750
and
XR16C2850
Pin-to-pin compatible to TI’s TL16C752B on the 48-
TQFP package
2 independent UART channels
Up to 1.5 Mbps data rate with a 24 MHz crystal
oscillator or external clock frequency
1 byte Transmit FIFO
1 byte Receive FIFO with error tags
Status report registers
Modem control signals (CTS#, RTS#, DSR#,
DTR#, RI#, CD#)
Programmable character lengths (5, 6, 7, 8)
with even, odd, or no parity
Crystal oscillator or external clock input
TTL compatible inputs, outputs
Industrial temperature ranges
48-TQFP and 44-PLCC packages
FIGURE 1. XR16L2450 BLOCK DIAGRAM
XTAL1
XTAL2
Crystal Osc/Buffer
TXA
RTSA#, CTSA#,
DTRA#, DSRA#,
CDA#, RIA#, OP2A#
8-bit Data
Bus
Interface
UART Channel A
BRG
THR
UART
Regs
2.25 to 5.5 Volt VCC
UART Channel B
(same as Channel A)
A2:A0
D7:D0
CSA#
CSB#
INTA
INTB
IOW#
IOR#
Reset
RHR
Modem I/Os
RXA
TXB
RTSB#, CTSB#,
DTRB#, DSRB#,
CDB#, RIB#, OP2B#
RXB
*5V Tolerant inputs
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