參數(shù)資料
型號: XR16L2750
廠商: Exar Corporation
英文描述: 2.25V TO 5.5V DUART WITH 64-BYTE FIFO
中文描述: 2.25V至5.5V的杜阿爾特64字節(jié)FIFO
文件頁數(shù): 43/49頁
文件大小: 602K
代理商: XR16L2750
XR16L2750
2.25V TO 5.5V DUART WITH 64-BYTE FIFO
REV. 1.0.0
á
43
F
IGURE
21. R
ECEIVE
R
EADY
& I
NTERRUPT
T
IMING
[FIFO M
ODE
, DMA E
NABLED
]
FOR
C
HANNELS
A & B
F
IGURE
22. T
RANSMIT
R
EADY
& I
NTERRUPT
T
IMING
[FIFO M
ODE
, DMA M
ODE
D
ISABLED
]
FOR
C
HANNELS
A & B
RX
RXRDY#
IOR#
(Reading data out
of RX FIFO)
INT
D0:D7
S
T
SSR
RXFIFODMA
RX FIFO fills up to RX
Trigger Level or RX Data
Timeout
RX FIFO drops
below RX
Trigger Level
FIFO
Empties
D0:D7
S
D0:D7
T
D0:D7
S
D0:D7
S
T
D0:D7
S
T
T
D0:D7
S
T
Start
Bit
Stop
Bit
T
RR
T
RRI
T
SSI
TX
TXRDY#
IOW#
(Loading data
into FIFO)
INT*
TXDMA#
D0:D7
S
D0:D7
T
D0:D7
S
D0:D7
S
T
D0:D7
S
T
T
D0:D7
S
T
Start
Bit
Stop
Bit
T
WRI
(Unloading)
Last Data Byte
Transmitted
TX FIFO fills up
to trigger level
TX FIFO drops
below trigger level
Data in
TX FIFO
TX FIFO
Empty
T
WT
T
SRT
TX FIFO
Empty
T
T
S
T
SI
ISR is read
IER[1]
enabled
ISR is read
*INT is cleared when the ISR is read or when TX FIFO fills up to the trigger level.
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