XR16L580
REV. 1.0.0
á
SMALLEST 2.25V TO 5.5V UART WITH 16-BYTE FIFO AND POWERSAVE
I
TABLE OF CONTENTS
GENERAL DESCRIPTION.................................................................................................1
A
PPLICATIONS
................................................................................................................................................1
F
EATURES
.....................................................................................................................................................1
F
IGURE
1. B
LOCK
D
IAGRAM
............................................................................................................................................................. 1
F
IGURE
2. P
ACKAGES
AND
P
IN
O
UT
................................................................................................................................................. 2
ORDERING
INFORMATION
.................................................................................................................................2
PIN DESCRIPTIONS .........................................................................................................3
1.0 PRODUCT DESCRIPTION .....................................................................................................................5
2.0 FUNCTIONAL DESCRIPTIONS .............................................................................................................6
2.1 CPU INTERFACE .............................................................................................................................................. 6
F
IGURE
3. XR16L580 T
YPICAL
I
NTEL
/M
OTOROLA
D
ATA
B
US
I
NTERCONNECTIONS
............................................................................. 6
2.2 5-VOLT TOLERANT INPUTS ........................................................................................................................... 7
2.3 DEVICE HARDWARE RESET .......................................................................................................................... 7
2.4 DEVICE IDENTIFICATION AND REVISION ..................................................................................................... 7
2.5 INTERNAL REGISTERS ................................................................................................................................... 7
2.6 DMA MODE ....................................................................................................................................................... 7
2.7 INT (IRQ#) OUTPUT ......................................................................................................................................... 7
T
ABLE
1: INT (IRQ#) P
IN
O
PERATION
FOR
T
RANSMITTER
................................................................................................................. 7
2.8 CRYSTAL OR EXTERNAL CLOCK INPUT ..................................................................................................... 8
F
IGURE
4. T
YPICAL
C
RYSTAL
CONNECTIONS
..................................................................................................................................... 8
T
ABLE
2: INT (IRQ#) P
IN
O
PERATION
F
OR
R
ECEIVER
...................................................................................................................... 8
2.9 PROGRAMMABLE BAUD RATE GENERATOR ............................................................................................ 9
F
IGURE
5. E
XTERNAL
C
LOCK
C
ONNECTION
FOR
E
XTENDED
D
ATA
R
ATE
............................................................................................ 9
F
IGURE
6. B
AUD
R
ATE
G
ENERATOR
AND
P
RESCALER
....................................................................................................................... 9
T
ABLE
3: T
YPICAL
DATA
RATES
WITH
A
14.7456 MH
Z
CRYSTAL
OR
EXTERNAL
CLOCK
...................................................................... 10
2.10 TRANSMITTER ............................................................................................................................................. 11
2.10.1 TRANSMIT HOLDING REGISTER (THR) - WRITE ONLY....................................................................................... 11
2.10.2 TRANSMITTER OPERATION IN NON-FIFO MODE................................................................................................ 11
2.10.3 TRANSMITTER OPERATION IN FIFO MODE ......................................................................................................... 11
F
IGURE
7. T
RANSMITTER
O
PERATION
IN
NON
-FIFO M
ODE
.............................................................................................................. 11
2.11 RECEIVER .................................................................................................................................................... 12
2.11.1 RECEIVE HOLDING REGISTER (RHR) - READ-ONLY .......................................................................................... 12
F
IGURE
8. T
RANSMITTER
O
PERATION
IN
FIFO
AND
F
LOW
C
ONTROL
M
ODE
..................................................................................... 12
F
IGURE
9. R
ECEIVER
O
PERATION
IN
NON
-FIFO M
ODE
.................................................................................................................... 13
F
IGURE
10. R
ECEIVER
O
PERATION
IN
FIFO
AND
A
UTO
RTS F
LOW
C
ONTROL
M
ODE
....................................................................... 13
2.12 AUTO RTS (HARDWARE) FLOW CONTROL ............................................................................................ 14
2.13 AUTO RTS HYSTERESIS ............................................................................................................................ 14
2.14 AUTO CTS FLOW CONTROL ..................................................................................................................... 14
F
IGURE
11. A
UTO
RTS
AND
CTS F
LOW
C
ONTROL
O
PERATION
....................................................................................................... 15
2.15 AUTO XON/XOFF (SOFTWARE) FLOW CONTROL .................................................................................. 16
2.16 SPECIAL CHARACTER DETECT ............................................................................................................... 16
T
ABLE
4: A
UTO
X
ON
/X
OFF
(S
OFTWARE
) F
LOW
C
ONTROL
............................................................................................................... 16
2.17 INFRARED MODE ........................................................................................................................................ 17
F
IGURE
12. I
NFRARED
T
RANSMIT
D
ATA
E
NCODING
AND
R
ECEIVE
D
ATA
D
ECODING
.......................................................................... 17
2.18 SLEEP MODE WITH WAKE-UP INTERRUPT AND POWER-SAVE FEATURE ........................................ 18
2.18.1 SLEEP MODE ........................................................................................................................................................... 18
2.18.2 POWER-SAVE FEATURE ........................................................................................................................................ 18
2.19 INTERNAL LOOPBACK .............................................................................................................................. 19
F
IGURE
13. I
NTERNAL
L
OOP
B
ACK
................................................................................................................................................. 19
3.0 UART INTERNAL REGISTERS ...........................................................................................................20
T
ABLE
5: UART INTERNAL REGISTERS.................................................................................................................................... 20
T
ABLE
6: INTERNAL REGISTERS DESCRIPTION. S
HADED
BITS
ARE
ENABLED
WHEN
EFR B
IT
-4=1.......................................... 21
4.0 INTERNAL REGISTER DESCRIPTIONS .............................................................................................22
4.1 RECEIVE HOLDING REGISTER (RHR) - READ- ONLY ............................................................................... 22
4.2 TRANSMIT HOLDING REGISTER (THR) - WRITE-ONLY ............................................................................ 22
4.3 BAUD RATE GENERATOR DIVISORS (DLL AND DLM) - READ/WRITE ................................................... 22
4.4 INTERRUPT ENABLE REGISTER (IER) - READ/WRITE .............................................................................. 22
4.4.1 IER VERSUS RECEIVE FIFO INTERRUPT MODE OPERATION ............................................................................. 22
4.4.2 IER VERSUS RECEIVE/TRANSMIT FIFO POLLED MODE OPERATION................................................................ 22