參數(shù)資料
型號: XR16M2751IM48-F
廠商: Exar Corporation
文件頁數(shù): 45/53頁
文件大小: 0K
描述: IC UART FIFO 64B DUAL 48TQFP
標(biāo)準(zhǔn)包裝: 250
特點: *
通道數(shù): 2,DUART
FIFO's: 64 字節(jié)
規(guī)程: RS232,RS485
電源電壓: 1.62 V ~ 3.63 V
帶自動流量控制功能:
帶IrDA 編碼器/解碼器:
帶故障啟動位檢測功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 48-TQFP
供應(yīng)商設(shè)備封裝: 48-TQFP(7x7)
包裝: 托盤
XR16M2751
5
REV. 1.0.0
1.62V TO 3.63V HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
OP2A#
32
O
Output Port 2 Channel A - The output state is defined by the user and through the
software setting of MCR[3]. INTA is set to the active mode and OP2A# output LOW
when MCR[3] is set to a logic 1. INTA is set to the three state mode and OP2A# out-
put HIGH when MCR[3] is set to a logic 0. See MCR[3]. If INTA is used, this output
should not be used as a general output else it will disturb the INTA output functional-
ity.
TXB
8
O
UART channel B Transmit Data or infrared encoder data. Standard transmit and
receive interface is enabled when MCR[6] = 0. In this mode, the TX signal will be
HIGH during reset or idle (no data). Infrared IrDA transmit and receive interface is
enabled when MCR[6] = 1. In the Infrared mode, the inactive state (no data) for the
Infrared encoder/decoder interface is LOW. If it is not used, leave it unconnected.
RXB
4
I
UART channel B Receive Data or infrared receive data. Normal receive data input
must idle HIGH. The infrared receiver pulses typically idles at logic 0 but can be
inverted by software control prior going in to the decoder, see MCR[6] and FCTR[2].
If this pin is not used, tie it to VCC or pull it high via a 100k ohm resistor.
RTSB#
22
O
UART channel B Request-to-Send (active low) or general purpose output. This port
must be asserted prior to using auto RTS flow control, see EFR[6], MCR[1],
FCTR[1:0], EMSR[5:4] and IER[6]. For auto RS485 half-duplex direction control, see
FCTR[3] and EMSR[3].
CTSB#
23
I
UART channel B Clear-to-Send (active low) or general purpose input. It can be
used for auto CTS flow control, see EFR[7], and IER[7]. This input should be con-
nected to VCC when not used.
DTRB#
35
O
UART channel B Data-Terminal-Ready (active low) or general purpose output. If it is
not used, leave it unconnected.
DSRB#
20
I
UART channel B Data-Set-Ready (active low) or general purpose input. This input
should be connected to VCC when not used. This input has no effect on the UART.
CDB#
16
I
UART channel B Carrier-Detect (active low) or general purpose input. This input
should be connected to VCC when not used. This input has no effect on the UART.
RIB#
21
I
UART channel B Ring-Indicator (active low) or general purpose input. This input
should be connected to VCC when not used. This input has no effect on the UART.
OP2B#
9
O
Output Port 2 Channel B - The output state is defined by the user and through the
software setting of MCR[3]. INTB is set to the active mode and OP2B# output LOW
when MCR[3] is set to a logic 1. INTB is set to the three state mode and OP2B# out-
put HIGH when MCR[3] is set to a logic 0. See MCR[3]. If INTB is used, this output
should not be used as a general output else it will disturb the INTB output functional-
ity.
ANCILLARY SIGNALS
XTAL1
13
I
Crystal or external clock input.
XTAL2
14
O
Crystal or buffered clock output.
PwrSave
12
I
PowerSave (active high). This feature isolates the 2751’s data bus interface from the
host preventing other bus activities that cause higher power drain during sleep mode.
See Sleep Mode with Auto Wake-up and PowerSave Feature section for details.
Pin Description
NAME
48-TQFP
PIN #
TYPE
DESCRIPTION
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