FIGURE 23" />
參數(shù)資料
型號(hào): XR16M580IM48-0A-EB
廠商: Exar Corporation
文件頁(yè)數(shù): 44/56頁(yè)
文件大?。?/td> 0K
描述: EVAL BOARD FOR XR16M580-A 48TQFP
標(biāo)準(zhǔn)包裝: 1
系列: *
XR16M580
49
REV. 1.0.0
1.62V TO 3.63V HIGH PERFORMANCE UART WITH 16-BYTE FIFO
FIGURE 23. TRANSMIT READY & INTERRUPT TIMING [NON-FIFO MODE]
FIGURE 24. RECEIVE READY & INTERRUPT TIMING [FIFO MODE]
TX
TXRDY#
IOW#
INT*
D0:D7
Start
Bit
D0:D7
Stop
Bit
D0:D7
T
WT
TXNonFIFO
T
WT
T
WT
T
WRI
T
WRI
T
WRI
T
SRT
T
SRT
T
SRT
*INT is cleared when the ISR is read or when data is loaded into the THR.
ISR is read
(Loading data
into THR)
(Unloading)
IER[1]
enabled
RX
RXRDY#
IOR#
INT
D0:D7
S
T
SSR
RXINTDMA#
RX FIFO fills up to RX
Trigger Level or RX Data
Timeout
RX FIFO drops
below RX
Trigger Level
FIFO
Empties
First Byte is
Received in
RX FIFO
D0:D7
S
D0:D7
T
D0:D7
S
D0:D7
S
T
D0:D7
S
T
D0:D7
S
T
Start
Bit
Stop
Bit
T
RR
T
RRI
T
SSI
(Reading data out
of RX FIFO)
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