參數(shù)資料
型號： XR16M581IL32-0C-EB
廠商： Exar Corporation
文件頁數(shù)： 1/51頁
文件大小： 0K
描述： EVAL BOARD FOR XR16M581-C 32QFN
標準包裝： 1
系列： *
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com
XR16M581
1.62V TO 3.63V UART WITH 16-BYTE FIFO AND VLIO INTERFACE
AUGUST 2009
REV. 1.0.1
GENERAL DESCRIPTION
The XR16M5811 (M581) is an enhanced Universal
Asynchronous Receiver and Transmitter (UART) with
a VLIO bus interface and has 16 bytes of transmit
and receive FIFOs, programmable transmit and
receive FIFO trigger levels, automatic hardware and
software flow control, and data rates of up to 20 Mbps
at 3.3V, 16 Mbps at 2.5V and 10 Mbps at 1.8V with
4X data sampling rate.
The Auto RS-485 Half-Duplex Direction control
feature simplifies both the hardware and software for
half-duplex RS-485 applications. In addition, the
Multidrop mode with Auto Address detection
increases the performance by simplifying the
software routines.
The Independent TX/RX Baud Rate Generator
feature allows the transmitter and receiver to operate
at different baud rates. Power consumption of the
M581 can be minmized by enabling the sleep mode
and PowerSave mode.
The M581 has a 16550 compatible register set that
provide users with operating status and control,
receiver error indications, and modem serial interface
controls. An internal loopback capability allows
onboard diagnostics. The M581 is available in 24-pin
QFN, 32-pin QFN and 25-pin BGA packages.
NOTE: 1 Covered by U.S. Patent #5,649,122.
FEATURES
VLIO bus interface
Pin-to-pin compatible with SC16C850V and
SC16C850SV in 32-QFN package
20 Mbps maximum data rate
Programmable TX/RX FIFO Trigger Levels
TX/RX FIFO Level Counters
Independent TX/RX Baud Rate Generator
Fractional Baud Rate Generator
Auto RTS/CTS Hardware Flow Control
Auto XON/XOFF Software Flow Control
Auto RS-485 Half-Duplex Direction Control
Multidrop mode w/ Auto Address Detect
Sleep Mode with Automatic Wake-up
PowerSave mode
Infrared (IrDA 1.0 and 1.1) mode
1.62V to 3.63V supply operation
Crystal oscillator or external clock input
APPLICATIONS
Personal Digital Assistants (PDA)
Cellular Phones/Data Devices
Battery-Operated Devices
Global Positioning System (GPS)
Bluetooth
FIGURE 1. XR16M581 BLOCK DIAGRAM
VCC
XTAL1
XTAL2
Crystal Osc/Buffer
TX, RX,
RTS#, CTS#,
DTR#, DSR#,
VLIO Bus
Interface
16 Byte RX FIFO
RX
BRG
IR
ENDEC
TX &
RX
UART
Regs
LLA#
PwrSave
16 Byte TX FIFO
RI#, CD#
RESET#
AD7:AD0
IOW #
CS#
INT
IOR#
GND
(1.62 to 3.63 V)
TX
BRG
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