REV. 1.0.2 1.62V TO 3.63V HIGH PERFORMANCE UART WITH 64-BYTE FIFO an interrupt is pending from any channel. The M770 will stay in t" />
參數(shù)資料
型號： XR16M770IL32-0B-EB
廠商： Exar Corporation
文件頁數(shù)： 14/52頁
文件大?。?/td> 0K
描述： EVAL BOARD FOR XR16M770-B 32QFN
標準包裝： 1
系列： *
XR16M770
21
REV. 1.0.2
1.62V TO 3.63V HIGH PERFORMANCE UART WITH 64-BYTE FIFO
an interrupt is pending from any channel. The M770 will stay in the sleep mode of operation until it is disabled
by setting IER bit-4 to a logic 0.
A word of caution: owing to the starting up delay of the crystal oscillator after waking up from sleep mode, the
first few receive characters may be lost. Also, make sure the RX pin is idling HIGH or “marking” condition
during sleep mode. This may not occur when the external interface transceivers (RS-232, RS-485 or another
type) are also put to sleep mode and cannot maintain the “marking” condition. To avoid this, the system design
engineer can use a 47k ohm pull-up resistor on each of the RX input.
2.17.2
Power-Save Feature
If the address lines, data bus lines, IOW#, IOR#, CS# and modem input lines remain steady when the M770 is
in sleep mode, the maximum current will be in the microamp range as specified in the DC Electrical
Characteristics on page 43. If the input lines are floating or are toggling while the M770 is in sleep mode, the
current can be up to 100 times more. If not using the Power-Save feature, an external buffer would be required
to keep the address and data bus lines from toggling or floating to achieve the low current. But if the Power-
Save feature is enabled (PwrSave pin connected to VCC), this will eliminate the need for an external buffer by
internally isolating the address, data and control signals (see Figure 1 on page 1) from other bus activities that
could cause wasteful power drain. The M770 enters Power-Save mode when this pin is connected to VCC and
the M770 is in sleep mode (see Sleep Mode section above).
Since Power-Save mode isolates the address, data and control signals, the device will wake-up only by:
■ a receive data start bit transition (HIGH to LOW) at the RX input or
■ a change of logic state on the modem or general purpose serial input CTS#, DSR#, CD#, RI#
The M770 will return to the Power-Save mode automatically after a read to the MSR (to reset the modem input
CTS#) and all interrupting conditions have been serviced and cleared. The M770 will stay in the Power-Save
mode of operation until it is disabled by setting IER bit-4 to a logic 0 and/or the Power-Save pin is connected to
GND.
2.17.3
Wake-up Interrupt
The M770 has the wake up interrupt. By setting the FCR bit-3, wake up interrupt is enabled or disabled. The
default status of wake up interrupt is disabled. Please See ”Section 4.5, FIFO Control Register (FCR) -
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參數(shù)描述
XR16M770IL32-0C-EB 功能描述:界面開發(fā)工具 Eval Board for XR16M770IL32 Series RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V
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XR16M770IL32TR-F 制造商:Exar Corporation 功能描述:UART 1-CH 64Byte FIFO 1.8V/2.5V/3.3V 32-Pin QFN EP T/R 制造商:Exar Corporation 功能描述:XR16M770IL32TR-F
XR16M780 制造商:EXAR 制造商全稱:EXAR 功能描述:1.62V TO 3.63V HIGH PERFORMANCE UART WITH 64-BYTE FIFO
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