參數(shù)資料
型號： XR16V654IL-F
廠商： Exar Corporation
文件頁數(shù)： 55/58頁
文件大?。?/td> 0K
描述： IC UART FIFO 64B QUAD 48QFN
標(biāo)準(zhǔn)包裝： 260
特點(diǎn)： *
通道數(shù)： 4，QUART
FIFO's： 64 字節(jié)
規(guī)程： RS232
電源電壓： 2.25 V ~ 3.6 V
帶自動流量控制功能： 是
帶IrDA 編碼器/解碼器： 是
帶故障啟動位檢測功能： 是
帶調(diào)制解調(diào)器控制功能： 是
帶CMOS： 是
安裝類型： 表面貼裝
封裝/外殼： 48-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 48-QFN-EP（7x7）
包裝： 托盤
其它名稱： 1016-1468
XR16V654IL-F-ND
XR16V654/654D
6
2.25V TO 3.6V QUAD UART WITH 64-BYTE FIFO
REV. 1.0.1
IOW#
(R/W#)
7
9
18
11
15
I
When 16/68# pin is HIGH, it selects Intel
bus interface and this input becomes write
strobe (active low). The falling edge insti-
gates the internal write cycle and the rising
edge transfers the data byte on the data
bus to an internal register pointed by the
address lines.
When 16/68# pin is LOW, the Motorola bus
interface is selected and this input becomes
read (logic 1) and write (logic 0) signal.
CSA#
(CS#)
5
7
16
9
13
I
When 16/68# pin is HIGH, this input is chip
select A (active low) to enable channel A in
the device.
When 16/68# pin is LOW, this input
becomes the chip select (active low) for the
Motorola bus interface.
CSB#
(A3)
9
11
20
13
17
I
When 16/68# pin is HIGH, this input is chip
select B (active low) to enable channel B in
the device.
When 16/68# pin is LOW, this input
becomes address line A3 which is used for
channel selection in the Motorola bus inter-
face.
CSC#
(A4)
27
38
50
49
64
I
When 16/68# pin is HIGH, this input is chip
select C (active low) to enable channel C in
the device.
When 16/68# pin is LOW, this input
becomes address line A4 which is used for
channel selection in the Motorola bus inter-
face.
CSD#
(VCC)
31
42
54
53
68
I
When 16/68# pin is HIGH, this input is chip
select D (active low) to enable channel D in
the device.
When 16/68# pin is LOW, this input is not
used and should be connected VCC.
INTA
(IRQ#)
4
6
15
8
12
O
(OD)
When 16/68# pin is HIGH for Intel bus inter-
face, this ouput becomes channel A inter-
rupt output. The output state is defined by
the user and through the software setting of
MCR[3]. INTA is set to the active mode
when MCR[3] is set to a logic 1. INTA is set
to the three state mode when MCR[3] is set
to a logic 0 (default). See MCR[3].
When 16/68# pin is LOW for Motorola bus
interface, this output becomes device inter-
rupt output (active low, open drain). An
external pull-up resistor is required for
proper operation.
Pin Description
NAME
48-QFN
PIN #
64-LQFP
PIN #
68-PLCC
PIN#
80-LQFP
PIN #
100-QFP
PIN #
TYPE
DESCRIPTION
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